Updated on 2026/05/30

写真a

 
SUGAHARA SATOSHI
 
Organization
Institute of Integrated Research Laboratory for Future Interdisciplinary Research of Science and Technology Associate Professor
Title
Associate Professor
External link

News & Topics
  • エネルギー最小点で動作するAI半導体(ニューラルネットワーク・アクセラレータ)技術の開発に成功 モバイルエッジ高性能AI技術

    2023/04/26

    Languages: Japanese

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    要点-エネルギー最小点におけるSRAM動作と、超低電圧リテンションによるパワーゲーティングの両方を実現できる新たなSRAM技術を用いて、プロセッシング・イン・メモリ(PIM)型のニューラルネットワーク(NN)アクセラレータのマクロを開発。-動作時電力を99%、

  • 体温を用いた新たなマイクロ熱電発電モジュール技術の開発に成功 ウェアラブルエレクトロニクス実現に貢献する新たな電源技術

    2020/11/06

    Languages: Japanese

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    要点-薄膜熱電材料によるゼーベック素子および、絶縁体と真空による熱アイソレーションに用いる新しいマイクロ熱電発電モジュールを提案した。-体温を熱源としたマイクロ熱電発電モジュールのデバイスモデリングと最適設計アルゴリズムから成る設計技術を開発した。-最適設計された本熱電発電モジュールがウェアラブルデ

  • マイクロプロセッサの待機時電力を大幅に削減する新技術を開発

    2016/11/14

    Languages: Japanese

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    要点 マイクロプロセッサおよびシステムオンチップ(SoC)におけるコアの待機時電力の削減に有効な不揮発性SRAM[用語1]を用いた新たな低消費電力技術(パワーゲーティング)を開発した。不揮発性メモリ素子(強磁性トンネル接合;MTJ[用語2])をSRAMに組み込んだ不揮発性SRAMの設計法および駆動法を開発してチップ試作を行った。試作チップの評価結果から、不揮発性SRAMを用いたパワーゲーティングのエネルギー性能を解析して、この技術を用いれば、マイクロプロセッサおよびSoCの課題となっていたコア部(演算を行うプロセッサの中心部分)におけるパワーゲーティングのエネルギー削減効率を大幅に向上できることを明らかにした。

  • 不揮発性パワーゲーティングがCMOSロジックシステムの待機時電力削減に威力

    2015/03/20

    Languages: Japanese

  • High performance logic systems for less power

    2013/02/28

    Languages: English

  • CMOS/スピントロニクス融合技術を用いた新しい低消費電力技術を開発

    2012/12/11

    Languages: Japanese

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    東京工業大学の菅原聡准教授,周藤悠介特任助教,山本修一郎助教らの研究グループは,神奈川科学技術アカデミーと共同で,CMOS/スピントロニクス融合技術を応用した擬似スピンMOSFETを用いて構成できる不揮発性SRAM(NV-SRAM)および不揮発性フリップフロップ(NV-FF)の開発を行った.高精度回路シミュレーションから,擬似スピンMOSFETを用いたこれら記憶回路の優位性・有用性と,不揮発性パワーゲーティング(NVPG)と呼ばれる究極のスタンバイ(待機時)電力削減アーキテクチャへ応用した場合の効果と設計指針を明らかにした.この研究成果は,12月10日から米国サンフランシスコで開催される米国IEEE学会主催の電子デバイス技術に関する世界最高峰の国際会議IEDMで発表する.

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Degree

  • Doctor of Engineering ( Tokyo Institute of Technology )

Research Areas

  • Informatics / Computer system  / CMOS,SRAM,PIM,Accelerator,AI

Education

  • Tokyo Institute of Technology   Science of Engineering

    - 1996

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    Country: Japan

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Research History

  • -:東京大学 新領域創成科学研究科基盤情報学専攻 助手

    2005

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  • -:東京大学 大学院工学系研究科電子工学専攻 助手

    2002

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  • -:東京工業大学 大学院理工学研究科電気電子工学専攻 助手

    1996

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Professional Memberships

Papers

  • A New Ultralow-Voltage Retention SRAM Cell Enhancing Noise Immunity

    Katsutoshi Ito, Yusaku Shiotsu, Satoshi Sugahara

    IEEE OPEN JOURNAL OF CIRCUITS AND SYSTEMS   6   370 - 382   2025

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    DOI: 10.1109/OJCAS.2025.3594022

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  • Binarized Neural-Network Parallel-Processing Accelerator Macro Designed for an Energy Efficiency Higher Than 100 TOPS/W

    Yusaku Shiotsu, Satoshi Sugahara

    IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS   11   25 - 33   2025

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    DOI: 10.1109/JXCDC.2025.3538702

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  • Design of Highly-Stable Energy-Minimum-Point SRAM Using Ultralow-Voltage Retention Cell

    Katsutoshi Ito, Yusaku Shiotsu, Satoshi Sugahara

    2024 IEEE INTERNATIONAL MEETING FOR FUTURE OF ELECTRON DEVICES, KANSAI, IMFEDK 2024   2024

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    DOI: 10.1109/IMFEDK64776.2024.10814372

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  • Comparative Study of Gain Cells for Pseudo-SRAM

    Sei Yoshida, Yusaku Shiotsu, Satoshi Sugahara

    2024 IEEE INTERNATIONAL MEETING FOR FUTURE OF ELECTRON DEVICES, KANSAI, IMFEDK 2024   2024

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    Language:English   Publishing type:Research paper (international conference proceedings)  

    DOI: 10.1109/IMFEDK64776.2024.10814569

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  • Spin Injection Behavior of CoFe/MgO/Si Tunnel Contacts: Effects of Radical Oxygen Annealing Reviewed

    Taiju Akushichi, Yota Takamura, Yusaku Shiotsu, Shuu’ichirou Yamamoto, Satoshi Sugahara

    Journal of Electronic Materials   52 ( 10 )   6902 - 6910   2023.8

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    Language:English   Publishing type:Research paper (scientific journal)   Publisher:Springer Science and Business Media LLC  

    DOI: 10.1007/s11664-023-10606-4

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    Other Link: https://link.springer.com/article/10.1007/s11664-023-10606-4/fulltext.html

  • Binarized Neural Network Accelerator Macro Using Ultralow-Voltage Retention SRAM for Energy Minimum-Point Operation

    Yusaku Shiotsu, Satoshi Sugahara

    IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS   8 ( 2 )   134 - 144   2022.12

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    DOI: 10.1109/JXCDC.2022.3225744

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  • Ultralow-Voltage Retention SRAM With a Power Gating Cell Architecture Using Header and Footer Power-Switches

    Hayato Yoshida, Yusaku Shiotsu, Daiki Kitagata, Shuu'ichirou Yamamoto, Satoshi Sugahara

    IEEE OPEN JOURNAL OF CIRCUITS AND SYSTEMS   2   520 - 533   2021

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    DOI: 10.1109/OJCAS.2021.3104945

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  • Proactive useless data flush architecture for nonvolatile SRAM using magnetic tunnel junctions

    Daiki Kitagata, Shuu'ichirou Yamamoto, Satoshi Sugahara

    IEICE ELECTRONICS EXPRESS   17 ( 5 )   2020.3

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    DOI: 10.1587/elex.17.20200032

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  • Design and energy-efficient architectures for nonvolatile static random access memory using magnetic tunnel junctions

    Daiki Kitagata, Shuu'ichirou Yamamoto, Satoshi Sugahara

    JAPANESE JOURNAL OF APPLIED PHYSICS   58   2019.4

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    DOI: 10.7567/1347-4065/ab00f5

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  • Inverse-magnetostriction-induced switching current reduction of STT-MTJs and its application for low-voltage MRAM Reviewed

    Yota Takamura, Yusuke Shuto, Shu'uichiro Yamamoto, Hiroshi Funakubo, Minoru Kuribayashi Kurosawa, Shigeki Nakagawa, Satoshi Sugahara

    SOLID-STATE ELECTRONICS   128   194 - 199   2017.2

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    DOI: 10.1016/j.sse.2016.10.007

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  • Analysis of spin accumulation in a Si channel using CoFe/MgO/Si spin injectors Reviewed

    Taiju Akushichi, Daiki Kitagata, Yusuke Shuto, Satoshi Sugahara

    2017 IEEE ELECTRON DEVICES TECHNOLOGY AND MANUFACTURING CONFERENCE (EDTM)   204 - 205   2017

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  • Analysis of break-even time for nonvolatile SRAM with SOTB technology Reviewed

    Daiki Kitagata, Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2017 IEEE ELECTRON DEVICES TECHNOLOGY AND MANUFACTURING CONFERENCE (EDTM)   72 - 74   2017

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  • Design and implementation of nonvolatile power-gating SRAM using SOTB technology Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    ISLPED '16: PROCEEDINGS OF THE 2016 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN   338 - 343   2016.8

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    Language:English   Publishing type:Research paper (international conference proceedings)  

    DOI: 10.1145/2934583.2934628

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  • Spin-Transistor Technology for Spintronics/CMOS Hybrid Logic Circuits and Systems Reviewed

    Satoshi Sugahara, Yusuke Shuto, Shuu'ichirou Yamamoto

    Nanomagnetic Devices and Phenomena for Energy-Efficient Computing   65 - 90   2016.2

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    Language:English   Publishing type:Part of collection (book)   Publisher:Wiley Blackwell  

    DOI: 10.1002/9781118869239.ch3

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  • Energy performance of nonvolatile power-gating SRAM using SOTB technology Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2016 46TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC)   87 - 90   2016

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  • Nonvolatile power-gating architecture for SRAM using SOTB technology Reviewed

    Y. Shuto, S. Yamamoto, S. Sugahara

    2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW)   166 - 167   2016

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  • Energy performance of nonvolatile power-gating SRAM using SOTB technology Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    ESSCIRC CONFERENCE 2016   95 - 98   2016

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  • New power-gating architectures using nonvolatile retention: Comparative study of nonvolatile power-gating (NVPG) and normally-off architectures for SRAM Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2016 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS)   136 - 141   2016

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  • Quantitative comparison of power-gating architectures for FinFET-based nonvolatile SRAM using spintronics retention technology Reviewed

    Yusuke Shuto, Shuu'Ichirou Yamamoto, Satoshi Sugahara

    2015 4th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2015 - Proceedings   2015.11

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:Institute of Electrical and Electronics Engineers Inc.  

    DOI: 10.1109/E3S.2015.7336784

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  • Field-effect spin-transistors Reviewed

    Satoshi Sugahara, Yota Takamura, Yusuke Shuto, Shuu'ichirou Yamamoto

    Handbook of Spintronics   1243 - 1279   2015.9

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    Language:English   Publishing type:Part of collection (book)   Publisher:Springer Netherlands  

    DOI: 10.1007/978-94-007-6892-5_44

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  • Spin accumulation in Si channels using CoFe/MgO/Si and CoFe/AlOx/Si tunnel contacts with high quality tunnel barriers prepared by radical-oxygen annealing

    Taiju Akushichi, Yota Takamura, Yusuke Shuto, Satoshi Sugahara

    Vol. 117 ( No. 17 )   2015.5

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    DOI: 10.1063/1.4919270

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  • Analysis and design of nonlocal spin devices with electric-field-induced spin-transport acceleration Reviewed

    Yota Takamura, Taiju Akushichi, Yusuke Shuto, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   117 ( 17 )   2015.5

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    DOI: 10.1063/1.4918635

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  • Fabrication and characterization of spin injector using a high-quality B2-ordered-Co2FeSi0.5Al0.5/MgO/Si(100) tunnel contact Reviewed

    Yu Kawame, Taiju Akushichi, Yota Takamura, Yusuke Shuto, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   117 ( 17 )   2015.5

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    DOI: 10.1063/1.4918567

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  • Structural and magnetic properties of ferromagnetic Fe1-xSix (0.18 <= x <= 0.33) films formed by rapid thermal annealing on silicon-on-insulator substrates Reviewed

    R. Nakane, S. Sugahara, M. Tanaka

    JOURNAL OF APPLIED PHYSICS   117 ( 13 )   2015.4

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    DOI: 10.1063/1.49153351

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  • Comparative study of power-gating architectures for nonvolatile FinFET-SRAM using spintronics-based retention technology Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)   866 - 871   2015

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  • Fabrication of pseudo-spin-MOSFETs using a multi-project wafer CMOS chip

    R. Nakane, Y. Shuto, H. Sukegawa, Z. C. Wen, S. Yamamoto, S. Mitani, M. Tanaka, K. Inomata, S. Sugahara

    SOLID-STATE ELECTRONICS   102   52 - 58   2014.12

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    DOI: 10.1016/j.sse.2014.06.004

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  • Analysis of Hanle-effect signals observed in Si-channel spin accumulation devices Reviewed

    Yota Takamura, Taiju Akushichi, Adiyudha Sadano, Takao Okishio, Yusuke Shuto, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   115 ( 17 )   2014.5

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    DOI: 10.1063/1.4868502

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  • Near-threshold voltage operation of a nonvolatile SRAM cell based on pseudo-spin-FinFET architecture Reviewed

    Y. Shuto, S. Yamamoto, S. Sugahara

    2014 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)   2014

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  • 0.5V operation and performance of nonvolatile SRAM cell based on pseudo-spin-FinFET architecture Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2014 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)   305 - 308   2014

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  • Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technology Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS)   699 - 702   2014

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  • Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic Reviewed

    Shuu'ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

    EUROPEAN PHYSICAL JOURNAL-APPLIED PHYSICS   63 ( 1 )   2013.7

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    Language:English   Publishing type:Research paper (scientific journal)  

    DOI: 10.1051/epjap/2013120486

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  • Monolithic integration of pseudo-spin-MOSFETs using a custom CMOS chip fabricated through multi-project wafer service Reviewed

    R. Nakane, Y. Shuto, H. Sukegawa, Z. C. Wen, S. Yamamoto, S. Mitani, M. Tanaka, K. Inomata, S. Sugahara

    2013 PROCEEDINGS OF THE EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC)   272 - 275   2013

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    DOI: 10.1109/ESSDERC.2013.6818871

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    Other Link: http://orcid.org/0000-0001-7496-1339

  • FinFET-based pseudo-spin-transistor: Design and performance Reviewed

    Yusuke Shuto, Shuu'Ichirou Yamamoto, Satoshi Sugahara

    2013 IEEE International Semiconductor Conference Dresden - Grenoble: Technology, Design, Packaging, Simulation and Test, ISCDG 2013   2013

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    DOI: 10.1109/ISCDG.2013.6656305

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  • Nonvolatile Power-Gating Field-Programmable Gate Array Using Nonvolatile Static Random Access Memory and Nonvolatile Flip-Flops Based on Pseudo-Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions Reviewed

    Shuu'ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

    JAPANESE JOURNAL OF APPLIED PHYSICS   51 ( 11 )   2012.11

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    DOI: 10.1143/JJAP.51.11PB02

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  • Fabrication of High-Quality Co2FeSi/SiO (x) N (y) /Si(100) Tunnel Contacts Using Radical-Oxynitridation-Formed SiO (x) N (y) Barrier for Si-Based Spin Transistors Reviewed

    Yota Takamura, Kengo Hayashi, Yusuke Shuto, Satoshi Sugahara

    JOURNAL OF ELECTRONIC MATERIALS   41 ( 5 )   954 - 958   2012.5

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    Language:English   Publishing type:Research paper (scientific journal)  

    DOI: 10.1007/s11664-012-2078-6

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  • Evaluation and Control of Break-Even Time of Nonvolatile Static Random Access Memory Based on Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    JAPANESE JOURNAL OF APPLIED PHYSICS   51 ( 4 )   2012.4

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    DOI: 10.1143/JJAP.51.040212

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  • Nonvolatile power-gating FPGA based on pseudo-spin-transistor architecture with spin-transfer-torque MTJs Reviewed

    Shuu'ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

    Materials Research Society Symposium Proceedings   1430   55 - 60   2012

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    DOI: 10.1557/opl.2012.1183

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  • Static noise margin and power-gating efficiency of a new nonvolatile SRAM cell based on pseudo-spin-transistor architecture Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2012 4TH IEEE INTERNATIONAL MEMORY WORKSHOP (IMW)   2012

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  • Nonvolatile flip-flop using pseudo-spin-transistor architecture and its power-gating applications Reviewed

    Shuu'Ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

    IEEE 2012 International Semiconductor Conference Dresden-Grenoble, ISCDG 2012   17 - 20   2012

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    DOI: 10.1109/ISCDG.2012.6360000

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  • Analysis of static noise margin and power-gating efficiency of a new nonvolatile SRAM cell using pseudo-spin-MOSFETs Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012   2012

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    DOI: 10.1109/SNW.2012.6243330

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  • Design and performance of pseudo-spin-MOSFETs using nano-CMOS devices Reviewed

    Y. Shuto, S. Yamamoto, H. Sukegawa, Z. C. Wen, R. Nakane, S. Mitani, M. Tanaka, K. Inomata, S. Sugahara

    Technical Digest - International Electron Devices Meeting, IEDM   29.6.4   2012

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    DOI: 10.1109/IEDM.2012.6479131

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  • Structural and magnetic properties of Ge1-xMnx thin films grown on Ge (001) substrates Reviewed

    Shinsuke Yada, Pham Nam Hai, Satoshi Sugahara, Masaaki Tanaka

    JOURNAL OF APPLIED PHYSICS   110 ( 7 )   073903   2011.10

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    DOI: 10.1063/1.3638701

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  • Nonvolatile delay flip-flop using spin-transistor architecture with spin transfer torque MTJs for power-gating systems Reviewed

    S. Yamamoto, Y. Shuto, S. Sugahara

    ELECTRONICS LETTERS   47 ( 18 )   1027 - U1562   2011.9

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    DOI: 10.1049/el.2011.1807

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  • Epitaxial germanidation of full-Heusler Co2FeGe alloy thin films formed by rapid thermal annealing Reviewed

    Yota Takamura, Takuya Sakurai, Ryosho Nakane, Yusuke Shuto, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   109 ( 7 )   2011.4

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    DOI: 10.1063/1.3562042

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  • Channel direction, effective field, and temperature dependencies of hole mobility in (110)-oriented Ge-on-insulator p-channel metal-oxide-semiconductor field-effect transistors fabricated by Ge condensation technique Reviewed

    Sanjeewa Dissanayake, Yi Zhao, S. Sugahara, Mitsuru Takenaka, Shinichi Takagi

    JOURNAL OF APPLIED PHYSICS   109 ( 3 )   2011.2

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    DOI: 10.1063/1.3537919

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  • Analysis and Design of Hanle-Effect Spin Transistors at 300 K Reviewed

    Yota Takamura, Satoshi Sugahara

    IEEE MAGNETICS LETTERS   2   2011

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    DOI: 10.1109/LMAG.2011.2166378

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  • Nonvolatile delay flip-flop based on spin-transistor architecture and its power-gating applications Reviewed

    Shuu'ichirou Yamamoto, Satoshi Sugahara

    Japanese Journal of Applied Physics   49 ( 9 )   2010.9

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    DOI: 10.1143/JJAP.49.090204

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  • III-V and Group-IV-Based Ferromagnetic Semiconductors for Spintronics Reviewed

    M. Tanaka, S. Ohya, S. Yada, Y. Shuto, S. Sugahara

    Comprehensive Nanoscience and Technology   1-5   447 - 462   2010.1

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    Language:English   Publishing type:Part of collection (book)   Publisher:Elsevier Inc.  

    DOI: 10.1016/B978-0-12-374396-1.00137-9

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  • A new spin-functional metal-oxide-semiconductor field-effect transistor based on magnetic tunnel junction technology: Pseudo-spin-mosfet

    Yusuke Shuto, Yusuke Shuto, Ryosho Nakane, Ryosho Nakane, Wenhong Wang, Wenhong Wang, Hiroaki Sukegawa, Hiroaki Sukegawa, Shuu'ichirou Yamamoto, Shuu'ichirou Yamamoto, Masaaki Tanaka, Masaaki Tanaka, Koichiro Inomata, Koichiro Inomata, Satoshi Sugahara, Satoshi Sugahara

    Applied Physics Express   3   2010.1

  • Nonvolatile Static Random Access Memory Using Resistive Switching Devices: Variable-Transconductance Metal-Oxide-Semiconductor Field-Effect-Transistor Approach Reviewed

    Shuu'ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

    JAPANESE JOURNAL OF APPLIED PHYSICS   49 ( 4 )   2010

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    DOI: 10.1143/JJAP.49.040209

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  • High Performance Ultrathin (110)-Oriented Ge-on-Insulator p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors Fabricated by Ge Condensation Technique Reviewed

    Dissanayake Sanjeewa, Tomiyama Kentaro, Sugahara Satoshi, Takenaka Mitsuru, Takagi Shinichi

    APPLIED PHYSICS EXPRESS   3 ( 4 )   2010

  • Nonvolatile static random access memory based on spin-transistor architecture Reviewed

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   105 ( 7 )   2009.4

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    DOI: 10.1063/1.3076895

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  • Evaluation of Electron and Hole Mobility at Identical Metal-Oxide-Semiconductor Interfaces by using Metal Source/Drain Ge-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors Reviewed

    Morii Kiyohito, Dissanayake Sanjeewa, Tanabe Satoshi, Nakane Ryosho, Takenaka Mitsuru, Sugahara Satoshi, Takagi Shinichi

    JAPANESE JOURNAL OF APPLIED PHYSICS   48 ( 4 )   2009.4

  • Nonvolatile SRAM (NV-SRAM) Using Functional MOSFET Merged with Resistive Switching Devices Reviewed

    Shuu'ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

    PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE   531 - +   2009

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    DOI: 10.1109/CICC.2009.5280761

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  • (110) Ultrathin GOI layers fabricated by Ge condensation method Reviewed

    Dissanayake Sanjeewa, Shuto Yusuke, Sugahara Satoshi, Takenaka Mitsuru, Takagi Shinichi

    THIN SOLID FILMS   517 ( 1 )   178 - 180   2008.11

  • Magnetoresistance in MOSFETs with ferromagnetic MnAs source and drain contacts: Spin injection and transport in Si MOS channels Reviewed

    R. Nakane, T. Harada, K. Sugiura, S. Sugahara, M. Tanaka

    Device Research Conference - Conference Digest, DRC   227 - 228   2008

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    DOI: 10.1109/DRC.2008.4800815

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  • Magneto-optical and magnetotransport properties of amorphous ferromagnetic semiconductor Ge1-xMnx thin films Reviewed

    Shinsuke Yada, Satoshi Sugahara, Masaaki Tanaka

    Applied Physics Letters   93 ( 19 )   2008

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    DOI: 10.1063/1.3023070

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  • Epitaxial lateral overgrowth of InGaAs on SiO2 from (111) Si micro channel areas Reviewed

    Hoshii Takuya, Deura Momoko, Sugiyama Masakazu, Nakane Ryosho, Sugahara Satoshi, Takenaka Mitsuru, Nakano Yoshiaki, Takagi Shinichi

    PHYSICA STATUS SOLIDI C - CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 5, NO 9   5 ( 9 )   2733 - +   2008

  • Schottky barrier MOSFETs with epitaxial ferromagnetic MnAs/Si(001) source and drain: Post-growth annealing and transport characteristics Reviewed

    K. Sugiura, R. Nakane, S. Sugahara, M. Tanaka

    JOURNAL OF CRYSTAL GROWTH   301   611 - 614   2007.4

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    DOI: 10.1016/j.jcrysgro.2006.12.003

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  • Erratum: Schottky barrier height of ferromagnet/ Si(001) junctions (Applied Physics Letters (2006) 89 (072110)) Reviewed

    Kuniaki Sugiura, Ryosho Nakane, Satoshi Sugahara, Masaaki Tanaka

    Applied Physics Letters   90 ( 2 )   2007

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    DOI: 10.1063/1.2432407

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  • Erratum: High Temperature Ferromagnetism in GaAs-Based Heterostructures with MnδDoping [Phys. Rev. Lett.95, 017201 (2005)] Reviewed

    A. M. Nazmul, T. Amemiya, Y. Shuto, S. Sugahara, M. Tanaka

    Physical Review Letters   96 ( 14 )   2006.4

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    DOI: 10.1103/physrevlett.96.149901

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  • Schottky barrier height of ferromagnet/Si(001) junctions Reviewed

    Kuniaki Sugiura, Ryosho Nakane, Satoshi Sugahara, Masaaki Tanaka

    Applied Physics Letters   89 ( 7 )   2006

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    DOI: 10.1063/1.2337562

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  • Spin devices for integrated circuits

    M. Tanaka, S. Sugahara

    INTERMAG ASIA 2005: Digests of the IEEE International Magnetics Conference   786   2005

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    DOI: 10.1109/intmag.2005.1464219

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  • Spin MOSFETs using ferromagnetic Schottky barrier contacts for the source and drain Reviewed

    S. Sugahara, M. Tanaka

    Device Research Conference - Conference Digest, DRC   2005   211 - 212   2005

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    DOI: 10.1109/DRC.2005.1553124

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  • Novel reconfigurable logic gates using spin metal-oxide-semiconductor field-effect transistors Reviewed

    T Matsuno, S Sugahara, M Tanaka

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS   43 ( 9A )   6032 - 6037   2004.9

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    DOI: 10.1143/JJAP.43.6032

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  • Spin-filter transistor Reviewed

    S Sugahara, M Tanaka

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS   43 ( 7A )   L838 - L841   2004.7

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    DOI: 10.1143/JJAP.43.L838

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  • A novel spin transistor based on spin-filtering in ferromagnetic barriers: a spin-filter transistor Reviewed

    S Sugahara, M Tanaka

    PHYSICA E-LOW-DIMENSIONAL SYSTEMS & NANOSTRUCTURES   21 ( 2-4 )   996 - 1001   2004.3

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    DOI: 10.1016/j.physe.2003.11.158

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  • Electrical and Optical Control of Ferromagnetism in III-V Semiconductor Heterostructures at High Temperature (∼100 K) Reviewed

    Ahsan M. Nazmul, Shigeki Kobayashi, Satoshi Sugahara, Masaaki Tanaka

    Japanese Journal of Applied Physics   43 ( No. 2A )   L233   2004.1

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    DOI: 10.1143/jjap.43.l233

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  • Ferromagnetism and high Curie temperature in semiconductor heterostructures with Mn δ-doped GaAs andp-type selective doping Reviewed

    Ahsan M. Nazmul, S. Sugahara, M. Tanaka

    Physical Review B   67 ( 24 )   2003.6

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    DOI: 10.1103/physrevb.67.241308

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  • Spin-polarized tunneling in fully epitaxial semiconductor-based magnetic tunnel junctions Reviewed

    M Tanaka, Y Higo, S Sugahara

    JOURNAL OF SUPERCONDUCTIVITY   16 ( 2 )   241 - 248   2003.4

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  • Spin-polarized tunneling in fully epitaxial semiconductor-based magnetic tunnel junctions

    M. Tanaka, Y. Higo, S. Sugahara

    Journal of Superconductivity and Novel Magnetism   16 ( 2 )   241 - 248   2003

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  • Transport properties of Mn δ-doped GaAs and the effect of selective doping Reviewed

    Ahsan M. Nazmul, S. Sugahara, M. Tanaka

    Applied Physics Letters   80 ( 17 )   3120   2002.4

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    DOI: 10.1063/1.1473878

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  • Growth characteristics and tunneling magnetoresistance of MnAs/AlAs/MnAs trilayer heterostructures grown on vicinal GaAs(111)B substrates Reviewed

    S Sugahara, M Tanaka

    PHYSICA E-LOW-DIMENSIONAL SYSTEMS & NANOSTRUCTURES   13 ( 2-4 )   582 - 588   2002.3

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  • Atomic-scale surface morphology of epitaxial ferromagnetic MnAs thin films grown on vicinal GaAs(111)B substrates Reviewed

    S Sugahara, M Tanaka

    JOURNAL OF APPLIED PHYSICS   89 ( 11 )   6677 - 6679   2001.6

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MISC

  • Power-gating architecture and performance of nonvolatile SRAM

    加藤豪人, 大木治弥, 塩津勇作, 山本修一郎, 菅原聡

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)   85th   2024

  • Design of nonvolatile SRAM using FinFETs for low-voltage operation

    Yamazaki Osamu, Sugahara Satoshi, Shiotsu Yusaku, Yamamoto Shuu'ichirou

    JSAP Annual Meetings Extended Abstracts   2022.2   2745 - 2745   2022.8

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    DOI: 10.11470/jsapmeeting.2022.2.0_2745

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  • Power-gating performance of ultralow-voltage-retention SRAM for near-threshold-voltage operation

    Yamamoto Syuu'ichirou, Sugahara Satoshi, Kato Taketo, Shiotsu Yusaku

    JSAP Annual Meetings Extended Abstracts   2022.2   2747 - 2747   2022.8

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    DOI: 10.11470/jsapmeeting.2022.2.0_2747

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  • Proposal of a new ultralow-voltage-retention SRAM (ULVR-SRAM) cell

    Ito Katsutoshi, Shiotsu Yusaku, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2022.2   2746 - 2746   2022.8

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    DOI: 10.11470/jsapmeeting.2022.2.0_2746

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  • Performance of a binarized neural network accelerator using ULVR-SRAM

    Shiotsu Yusaku, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2022.1   2355 - 2355   2022.2

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    DOI: 10.11470/jsapmeeting.2022.1.0_2355

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  • Power-gating performance and architecture of ultralow-voltage-retention SRAM

    Yano Hiroki, Shiotsu Yusaku, Sugahara Satoshi, Yamamoto Shuu'ichirou

    JSAP Annual Meetings Extended Abstracts   2022.1   2356 - 2356   2022.2

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    DOI: 10.11470/jsapmeeting.2022.1.0_2356

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  • Proposal and performance prediction of a BNN accelerator using ULVR-SRAM

    Shiotsu Yusaku, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2021.2   2648 - 2648   2021.8

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    DOI: 10.11470/jsapmeeting.2021.2.0_2648

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  • Design and analysis of an 8kB ULVR-SRAM macro for near-threshold voltage operations

    Hara Takumi, shiotsu yusaku, Yamamoto Shuu'ichirou, sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2021.2   2647 - 2647   2021.8

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    DOI: 10.11470/jsapmeeting.2021.2.0_2647

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  • Design and analysis of ULVR-SRAM using automatic body-bias control

    Hara Takumi, Saito Shuhei, Shiotsu Yusaku, Sugahara Satoshi, Yamamoto Shuu'ichirou

    JSAP Annual Meetings Extended Abstracts   2021.2   2646 - 2646   2021.8

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    DOI: 10.11470/jsapmeeting.2021.2.0_2646

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  • Design of ULVR-SRAM cell for near-threshold voltage operation

    Hara Takumi, Yamamoto Shuu'ichirou, Shiotsu Yusaku, Sugahara Satoshi, Yoshida Hayato

    JSAP Annual Meetings Extended Abstracts   2021.1   2349 - 2349   2021.2

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    DOI: 10.11470/jsapmeeting.2021.1.0_2349

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  • Power-gating performance of caches using ultralow-voltage-retention SRAM

    Yoshida Hayato, Shiotsu Yusaku, Sugahara Satoshi, Yamamoto Shuu'ichiro

    JSAP Annual Meetings Extended Abstracts   2021.1   2351 - 2351   2021.2

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    DOI: 10.11470/jsapmeeting.2021.1.0_2351

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  • Energy-efficient operation at energy minimum point for ultralow-voltage-retention SRAM

    Shiotsu Yusaku, Sugahara Satoshi, Yamamoto Shuu'ichirou

    JSAP Annual Meetings Extended Abstracts   2021.1   2350 - 2350   2021.2

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    DOI: 10.11470/jsapmeeting.2021.1.0_2350

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  • Design and analysis of ultralow-voltage-retention Flip-Flop configured with bulk devices

    松崎翼, 塩津勇作, 山本修一郎, 菅原聡

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)   82nd   2021

  • Design and analysis of a new ultralow-voltage-retention SRAM cell

    Kitagata Daiki, Yoshida Hayato, Shiotsu Yusaku, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2020.2   1847 - 1847   2020.8

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    DOI: 10.11470/jsapmeeting.2020.2.0_1847

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  • Design and analysis of 8kB SRAM macro using a new ultralow-voltage-retention architecture

    Shiotsu Yusaku, Kitagata Daiki, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2020.2   1848 - 1848   2020.8

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    DOI: 10.11470/jsapmeeting.2020.2.0_1848

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  • Effects of shutdown-allowed time distribution on power reduction efficiency of power gating for retention SRAMs

    Yoshida Hayato, Kitagata Daiki, Yamamoto Shuu'ichiro, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2020.2   1849 - 1849   2020.8

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    DOI: 10.11470/jsapmeeting.2020.2.0_1849

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  • Design and analysis of virtually nonvolatile SRAM cell for near-threshold voltage operation.

    Hara Takumi, Yoshida Hayato, Kitagata Daiki, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2020.1   2720 - 2720   2020.2

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    DOI: 10.11470/jsapmeeting.2020.1.0_2720

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  • Proposal of a new virtually nonvolatile SRAM cell

    Yoshida Hayato, Kitagata Daiki, Yamamoto Shuu'ichiro, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2020.1   2719 - 2719   2020.2

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    DOI: 10.11470/jsapmeeting.2020.1.0_2719

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  • Power-gating performance of SRAM using various retention techniques

    Hara Takumi, Yoshida Hayato, Yamamoto Shuu'ichirou, Sugahara Satoshi, Kitagata Daiki

    JSAP Annual Meetings Extended Abstracts   2019.2   3110 - 3110   2019.9

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    DOI: 10.11470/jsapmeeting.2019.2.0_3110

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  • Performance of nonvolatile power-gating using VNR-SRAM and NV-SRAM

    Kitagata Daiki, Yoshida Hayato, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2019.2   3108 - 3108   2019.9

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    DOI: 10.11470/jsapmeeting.2019.2.0_3108

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  • Nonvolatile power-gating using NV-SRAM based on the proactive flash of useless data

    Sugahara Satoshi, Yamamoto Shuu'ichirou, Kitagata Daiki

    JSAP Annual Meetings Extended Abstracts   2019.2   3111 - 3111   2019.9

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    DOI: 10.11470/jsapmeeting.2019.2.0_3111

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  • Design and analysis of virtually nonvolatile retention SRAM using dual power-switches

    Yoshida Hayato, Yamamoto Shuu'ichiro, Kitagata Daiki, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2019.1   2806 - 2806   2019.2

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    DOI: 10.11470/jsapmeeting.2019.1.0_2806

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  • Low-leakage design of a new piezoelectronic transistor and its SRAM application

    Shiotsu Yusaku, Funakubo Hiroshi, Yamamoto Shuu'ichiro, Sugahara Satoshi, Kurosawa Minoru Kuribayashi

    JSAP Annual Meetings Extended Abstracts   2019.1   2807 - 2807   2019.2

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    DOI: 10.11470/jsapmeeting.2019.1.0_2807

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  • Design and analysis of virtually nonvolatile retention SRAM using dual-mode inverters

    Yoshida Hayato, Kitagata Daiki, Yamamoto Shuu'ichiro, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2018.2   2936 - 2936   2018.9

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    DOI: 10.11470/jsapmeeting.2018.2.0_2936

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  • Energy performance of nonvolatile SRAM using hierarchical store-free shutdown architecture

    Kitagata Daiki, Sugahara Satoshi, Yamamoto Shuu'ichirou

    JSAP Annual Meetings Extended Abstracts   2018.1   3205 - 3205   2018.3

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    DOI: 10.11470/jsapmeeting.2018.1.0_3205

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  • Static-power reduction ability of nonvolatile SRAM with magnetic tunnel junctions

    Kitagata Daiki, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2017.2   2988 - 2988   2017.8

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    DOI: 10.11470/jsapmeeting.2017.2.0_2988

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  • 依頼講演 不揮発性SRAMのアーキテクチャとエネルギー性能—Architectures and energy performance of nonvolatile SRAM for core-level nonvolatile power-gating—集積回路

    北形 大樹, 周藤 悠介, 菅原 聡, 山本 修一郎

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   117 ( 9 )   51 - 56   2017.4

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    Other Link: https://ndlsearch.ndl.go.jp/books/R000000004-I028167051

  • Design and energy-performance analysis of nonvolatile SRAM

    Sugahara Satoshi, Shuto Yusuke, Yamamoto Shuu'ichirou, Kitagata Daiki

    JSAP Annual Meetings Extended Abstracts   2017.1   3033 - 3033   2017.3

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    DOI: 10.11470/jsapmeeting.2017.1.0_3033

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  • Quantitative comparison of power-gating architectures for nonvolatile SRAM

    Shuto Yusuke, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2015.2   2750 - 2750   2015.8

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    DOI: 10.11470/jsapmeeting.2015.2.0_2750

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  • FinFET-based pseudo-spin-MOSFET and its nonvolatile SRAM application

    Shuto Yusuke, Yamamoto Shuu'ichirou, Sugahara Satoshi

    JSAP Annual Meetings Extended Abstracts   2014.1   2859 - 2859   2014.3

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    DOI: 10.11470/jsapmeeting.2014.1.0_2859

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  • ナノCMOS技術を用いた擬似スピンMOSFETおよび不揮発性SRAMセルの性能と設計

    山本 修一郎, 菅原 聡, 周藤 悠介

    応用物理学会学術講演会講演予稿集   2013.1   2738 - 2738   2013.3

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    DOI: 10.11470/jsapmeeting.2013.1.0_2738

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  • 擬似スピンMOSFETを用いた不揮発性デュアルポートSRAMセルの提案とNVPG応用

    山本 修一郎, 周藤 悠介, 菅原 聡

    応用物理学会学術講演会講演予稿集   2013.1   2739 - 2739   2013.3

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    DOI: 10.11470/jsapmeeting.2013.1.0_2739

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  • Design and performance of pseudo-spin-MOSFETs using nano-CMOS devices

    SHUTO Yusuke, YAMAMOTO Shuu'ichirou, SUKEGAWA Hiroaki, Wen ZhenChao, NAKANE Ryosho, MITANI Seiji, TANAKA Masaaki, INOMATA Koichiro, SUGAHARA Satoshi

    Technical report of IEICE. SDM   112 ( 421 )   43 - 46   2013.1

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    The design and performance of pseudo-spin-MOSFETs (PS-MOSFETs) using nano-CMOS devices were computationally investigated The operations of a PS-MOSFET with current-induced magnetization switching were also expenmentally demonstrated by the hybrid integration of a vendor-made MOSFET and our-developed spin-transfer-torque magnetic tunnel junction The nonvolatile SRAM and delay flip-flop applications of PS-MOSFETs were also examined, and nonvolatile power-gating architecture using these circuits was developed.

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  • 擬似スピンMOSFETを用いた不揮発性SRAM:スリープモード動作とその応用

    周藤 悠介, 山本 修一郎, 菅原 聡

    応用物理学会学術講演会講演予稿集   2012.2   2797 - 2797   2012.8

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    DOI: 10.11470/jsapmeeting.2012.2.0_2797

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  • 擬似スピンMOSFETを用いた不揮発性SRAMのスタティックノイズマージンとエネルギー性能の解析—Static noise margin and energy performance analyses of a nonvolatile SRAM cell using pseudo-spin-MOSFET—シリコン材料・デバイス

    周藤 悠介, 山本 修一郎, 菅原 聡

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   112 ( 169 )   65 - 70   2012.8

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  • 擬似スピンMOSFETを用いた不揮発性SRAM:スタティックノイズマージン評価

    周藤 悠介, 山本 修一郎, 菅原 聡

    応用物理学会学術講演会講演予稿集   2012.1   3058 - 3058   2012.2

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    DOI: 10.11470/jsapmeeting.2012.1.0_3058

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  • 招待講演 CMOS/スピントロニクス融合技術による不揮発性ロジックシステムの展望—Nonvolatile logic systems based on CMOS/spintronics hybrid technology : An overview

    山本 修一郎, 菅原 聡, 周藤 悠介

    映像情報メディア学会技術報告 = ITE technical report   35 ( 38 )   63 - 70   2011.10

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  • 招待講演 CMOS/スピントロニクス融合技術による不揮発性ロジックシステムの展望—Nonvolatile logic systems based on CMOS/spintronics hybrid technology : An overview—磁気記録・情報ストレージ

    菅原 聡, 周藤 悠介, 山本 修一郎

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   111 ( 233 )   63 - 70   2011.10

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  • 擬似スピンMOSFETを用いた不揮発性SRAM:スリープ時リーク電流削減効果

    周藤 悠介, 山本 修一郎, 菅原 聡

    応用物理学会学術講演会講演予稿集   2011.2   2451 - 2451   2011.8

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    DOI: 10.11470/jsapmeeting.2011.2.0_2451

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  • CMOS/スピントロニクス融合技術による不揮発性ロジックシステムの展望—Nonvolatile logic systems based on CMOS/spintronics hybrid technology: an overview—特集 CMOSロジックの将来を切り拓く磁気技術

    菅原 聡, 周藤 悠介, 山本 修一郎

    まぐね = Magnetics Japan   6 ( 1 )   5 - 15   2011

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  • 擬似スピンMOSFETを用いた不揮発性SRAM:ストア時の書き込み電流制御

    周藤 悠介, 菅原 聡, 山本 修一郎

    応用物理学会学術講演会講演予稿集   2010.2   1825 - 1825   2010.8

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    DOI: 10.11470/jsapmeeting.2010.2.0_1825

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  • 擬似スピンMOSFETを用いた不揮発性SRAM:セルリーク電流とBETの削減

    周藤 悠介, 山本 修一郎, 菅原 聡

    応用物理学会学術講演会講演予稿集   2010.2   2696 - 2696   2010.8

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    DOI: 10.11470/jsapmeeting.2010.2.0_2696

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  • 不揮発性メモリ素子を用いた不揮発性/ばらつき補償SRAM技術

    菅原 聡, 山本 修一郎, 周藤 悠介

    応用物理学会学術講演会講演予稿集   2010.2   169 - 169   2010.8

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    DOI: 10.11470/jsapmeeting.2010.2.0_169

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  • 擬似スピンMOSFETを用いた不揮発性SRAMと不揮発性DFFのFPGA応用

    山本 修一郎, 周藤 悠介, 菅原 聡

    応用物理学会学術講演会講演予稿集   2010.2   1824 - 1824   2010.8

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    DOI: 10.11470/jsapmeeting.2010.2.0_1824

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  • Nonvolatile Static Random Access Memory Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture

    Shuu'ichirou Yamamoto, Satoshi Sugahara

    JAPANESE JOURNAL OF APPLIED PHYSICS   48 ( 4 )   043001/1-7   2009.4

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  • Analysis of L2(1)-ordering in full-Heusler Co2FeSi alloy thin films formed by rapid thermal annealing

    Yota Takamura, Ryosho Nakane, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   105 ( 7 )   07B109/1-3.   2009.4

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  • Perspective on integrated electronics based on spin-functional MOSFETs

    SUGAHARA Satoshi

    Oyo Buturi   78 ( 3 )   236 - 241   2009.3

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    The article describes spin-functional MOSFETs and their integrated electronics applications. The current and future status of spin-MOSFET and pseudo-spin-MOSFET technologies, which can merge MOSFETs with the functions of magneto-resistive devices at device and circuit levels, respectively, are briefly reviewed. Furthermore, a power-gating processor based on nonvolatile logic, which is expected to be the most important application of spin-functional MOSFETs, is also addressed.

    DOI: 10.11470/oubutsu.78.3_236

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  • Nonvolatile SRAM architecture using MOSFET-based spin-transistors

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    J. Appl. Phys.   105   07C933/1-3   2009

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  • スピン機能MOSFETによる不揮発性ロック 不揮発性パワーゲーティング・ロジックへの応用 不揮発性SRAM/フリップフロップの可能性を検証

    菅原聡, 周藤悠介, 山本修一郎

    46 - 49   2009

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  • スピン機能CMOSによる不揮発性高機能・高性能ロジック

    山本修一郎, 周藤悠介, 菅原聡

    スピントロニクスの基礎と材料・応用技術の最前線   ( 27章 )   319 - 330   2009

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  • Nonvolatile SRAM and flip-flop architectures using magnetic tunnel junctions with current-induced magnetization switching technology

    Shuu'ichirou Yamamoto, Satoshi Sugahara

    Jpn. J. Appl. Phys.   48 ( 4 )   043001-1-7   2009

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  • Nonvolatile SRAM architecture using MOSFET-based spin-transistors

    Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara

    J. Appl. Phys.   105   07C933/1-3   2009

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  • Nonvolatile Static Random Access Memory (NV-SRAM) Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture

    S. Yamamoto, S. Sugahara

    Jpn. J. Appl. Phys.   48 ( 4 )   043001/1-7   2009

  • Nonvolatile SRAM and flip-flop architectures using magnetic tunnel junctions with current-induced magnetization switching technology

    Shuu'ichirou Yamamoto, Satoshi Sugahara

    Jpn. J. Appl. Phys.   48 ( 4 )   043001-1-7   2009

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  • Epitaxial growth and magnetic properties of ferromagnetic semiconductor Ge1-xFex thin films epitaxially grown on Si(001) substrates

    Yusuke Shuto, Masaaki Tanaka, Satoshi Sugahara

    JAPANESE JOURNAL OF APPLIED PHYSICS   47 ( 9 )   7108 - 7112   2008.9

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  • 微小領域選択成長によるSi(111)基板上へのInAsピラーの形成

    HOSHII TAKUYA, DEURA MOMOKO, SUGIYAMA MASAKAZU, NAKANE RYOSHO, SUGAHARA SATOSHI, TAKENAKA MITSURU, NAKANO YOSHIAKI, TAKAGI SHIN'ICHI

    応用物理学関係連合講演会講演予稿集   55th ( 1 )   360   2008.3

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  • 微小領域選択MOVPEにおけるSi上InGaAsの横方向成長に対するGa組成の影響

    DEURA MOMOKO, HOSHII TAKUYA, SUGIYAMA MASAKAZU, NAKANE RYOSHO, TAKENAKA MITSURU, SUGAHARA SATOSHI, TAKAGI SHIN'ICHI, NAKANO YOSHIAKI

    応用物理学関係連合講演会講演予稿集   55th ( 1 )   359   2008.3

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  • 微小領域選択MOVPEにより作製したSi(111)面上InGaAsの構造解析

    SUGIYAMA MASAKAZU, DEURA MOMOKO, HOSHII TAKUYA, YAMAMOTO TAKEHISA, IKUHARA YUICHI, TAJIRI HIROO, SAKATA OSAMI, KIMURA SHIGERU, NAKANE RYOSHO, TAKENAKA MITSURU, SUGAHARA SATOSHI, TAKAGI SHIN'ICHI, NAKANO YOSHIAKI

    応用物理学関係連合講演会講演予稿集   55th ( 1 )   359   2008.3

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  • Carrier-transport-enhanced channel CMOS for improved power consumption and performance

    Shinichi Takagi, Toshifurni Irisawa, Tsutomu Tezuka, Toshinori Numata, Shu Nakaharai, Norio Hirashita, Yoshihiko Moriyama, Koji Usuda, Eiji Toyoda, Sanjeewa Dissanayake, Masato Shichijo, Ryosho Nakane, Satoshi Sugahara, Mitsuru Takenaka, Naoharu Sugiyama

    IEEE TRANSACTIONS ON ELECTRON DEVICES   55 ( 1 )   21 - 39   2008.1

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    DOI: 10.1109/TED.2007.911034

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  • Formation of Si- and Ge-based Full-Heusler Alloy Thin Films Using SOI and GOI Substrates for the Half-Metallic Source and Drain of Spin Transistors

    Y. Takamura, A. Nishijima, Y. Nagahama, R. Nakane, S. Sugahara

    SIGE, GE, AND RELATED COMPOUNDS 3: MATERIALS, PROCESSING, AND DEVICES   16 ( 10 )   945 - +   2008

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  • Germanium-based ferromagnetic semiconductor Ge1-xFex for silicon spintronics

    Yusuke Shuto, Masaaki Tanaka, Satoshi Sugahara

    SIGE, GE, AND RELATED COMPOUNDS 3: MATERIALS, PROCESSING, AND DEVICES   16 ( 10 )   953 - +   2008

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  • 微小領域選択成長によるSi上III/V化合物半導体層の形成

    出浦 桃子, 星井 拓也, 杉山 正和, 中根 了昌, 菅原 聡, 竹中 充, 高木 信一, 中野 義昭

    化学工学会 研究発表講演要旨集   2008 ( 0 )   208 - 208   2008

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    DOI: 10.11491/scej.2008.0.208.0

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  • 微小孔を介したSi基板上InGaAs成長におけるモフォロジー向上

    HOSHII TAKUYA, DEURA MOMOKO, SUGIYAMA MASAKAZU, NAKANE RYOSUKE, SUGAHARA SATOSHI, TAKENAKA MITSURU, NAKANO YOSHIAKI, TAKAGI SHIN'ICHI

    応用物理学会学術講演会講演予稿集   68th ( 1 )   343   2007.9

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  • Si上III/V族化合物半導体の選択MOVPEにおける初期核発生過程の観察と制御

    DEURA MOMOKO, SUGIYAMA MASAKAZU, HOSHII TAKUYA, NAKANE RYOSUKE, TAKENAKA MITSURU, SUGAHARA SATOSHI, TAKAGI SHIN'ICHI, NAKANO YOSHIAKI

    応用物理学会学術講演会講演予稿集   68th ( 1 )   343   2007.9

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  • Fabrication of III-V on insulator structures on si using microchannel epitaxy with a two-step growth technique

    Masato Shichijo, Ryosho Nakane, Satoshi Sugahara, Shinichi Takagi

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS   46 ( 9A )   5930 - 5934   2007.9

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  • Gate dielectric formation and MIS interface characterization on Ge

    S. Takagi, T. Maeda, N. Taoka, M. Nishizawa, Y. Morita, K. Ikeda, Y. Yamashita, M. Nishikawa, H. Kumagai, R. Nakane, S. Sugahara, N. Sugiyama

    MICROELECTRONIC ENGINEERING   84 ( 9-10 )   2314 - 2319   2007.9

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  • MOS-based spin devices for reconfigurable logic

    Masaaki Tanaka, Satoshi Sugahara

    IEEE TRANSACTIONS ON ELECTRON DEVICES   54 ( 5 )   961 - 976   2007.5

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  • Effect of tensile strain on gate current of strained-Si n-channel metal-oxide-semiconductor field-effect transistors

    Takuya Hoshii, Satoshi Sugahara, Shin-ichi Takagi

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS   46 ( 4B )   2122 - 2126   2007.4

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  • Effect of tensile strain on gate current of strained-Si n-channel metal-oxide-semiconductor field-effect transistors

    Takuya Hoshii, Satoshi Sugahara, Shin-ichi Takagi

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS   46 ( 4B )   2122 - 2126   2007.4

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  • Ultrathin Ge-on-insulator metal source/drain P-channel metal-oxide-semiconductor field-effect transistors fabricated by low-temperature molecular-beam epitaxy

    Takashi Uehara, Hiroshi Matsubara, Ryosho Nakane, Satoshi Sugahara, Shin-ichi Takagi

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS   46 ( 4B )   2117 - 2121   2007.4

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  • Device structures and carrier transport properties of advanced CMOS using high mobility channels

    S. Takagi, T. Tezuka, T. Irisawa, S. Nakaharai, T. Numata, K. Usuda, N. Sugiyama, M. Shichijo, R. Nakane, S. Sugahara

    SOLID-STATE ELECTRONICS   51 ( 4 )   526 - 536   2007.4

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  • Si基板上へのInGaAsの成長におけるInPバッファーの有効性

    星井拓也, 出浦桃子, 七条真人, 杉山正和, 菅原聡, 中野義昭, 高木信一

    応用物理学関係連合講演会講演予稿集   54th ( 1 )   365   2007.3

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  • Structural and magnetic properties of epitaxially grown Ge1-xFex thin films: Fe concentration dependence

    Yusuke Shuto, Masaaki Tanaka, Satoshi Sugahara

    APPLIED PHYSICS LETTERS   90 ( 13 )   132512/1-3   2007.3

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  • Preparation and characterization of ferromagnetic DO3-phase Fe3Si thin films on silicon-on-insulator substrates for Si-based spin-electronic device applications

    Ryosho Nakane, Masaaki Tanaka, Satoshi Sugahara

    APPLIED PHYSICS LETTERS   89 ( 19 )   192503/1-3   2006.11

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  • Spin MOSFETs as a basis for spintronics

    Satoshi Sugahara, Masaaki Tanaka

    ACM Transactions on Storage   2 ( 2 )   197 - 219   2006.5

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  • Magneto-optical properties of group-IV ferromagnetic semiconductor Ge1-xFex grown by low-temperature molecular beam epitaxy

    Yusuke Shuto, Masaaki Tanaka, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   99 ( 8 )   08D516/1-3   2006.4

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  • Magneto-optical properties of group-IV ferromagnetic semiconductor Ge1-xFex grown by low-temperature molecular beam epitaxy

    Yusuke Shuto, Masaaki Tanaka, Satoshi Sugahara

    JOURNAL OF APPLIED PHYSICS   99 ( 8 )   08D516/1-3   2006.4

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  • ひずみSi MOSFETのゲートトンネル電流に与えるひずみの効果

    星井拓也, 菅原聡, 高木信一

    応用物理学関係連合講演会講演予稿集   53rd ( 2 )   940   2006.3

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  • Epitaxial growth and magnetic properties of a new group-IV ferromagnetic semiconductor: Ge1-xFex

    Yusuke Shuto, Masaaki Tanaka, Satoshi Sugahara

    PHYSICA STATUS SOLIDI C - CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 3, NO 12   3 ( 12 )   4110 - 4114   2006

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  • Perspective on field-effect spin-transistors

    Satoshi Sugahara

    Physica Status Solidi (C) Current Topics in Solid State Physics   3 ( 12 )   4405 - 4413   2006

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  • Spin MOSFETs As a Basis for Spintronics

    S.Sugahara, M.Tanaka

    ACM Trans. on Storage   2 ( 2 )   197 - 219   2006

  • Perspective on field-effect spin-transistors

    Satoshi Sugahara

    PHYSICA STATUS SOLIDI C - CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 3, NO 12   3 ( 12 )   4405 - 4413   2006

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  • Ge上極薄Siのプラズマ酸化によるSiO2/Ge MISキャパシタの作製と電気特性

    熊谷寛, 七条真人, 石川寛人, 星井拓也, 菅原聡, 高木信一

    応用物理学会学術講演会講演予稿集   66th ( 2 )   673   2005.9

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  • Spin metal-oxide-semiconductor field-effect transistors (spin MOSFETs) for integrated spin electronics

    S Sugahara

    IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS   152 ( 4 )   355 - 365   2005.8

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  • High temperature ferromagnetism in GaAs-based heterostructures with Mn delta doping

    AM Nazmul, T Amemiya, Y Shuto, S Sugahara, M Tanaka

    PHYSICAL REVIEW LETTERS   95 ( 1 )   2005.7

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  • High temperature ferromagnetism in GaAs-based heterostructures with Mn delta doping

    AM Nazmul, T Amemiya, Y Shuto, S Sugahara, M Tanaka

    PHYSICAL REVIEW LETTERS   95 ( 1 )   2005.7

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  • A spin metal-oxide-semiconductor field-effect transistor (spin MOSIFET) with a ferromagnetic semiconductor for the channel

    S Sugahara, M Tanaka

    JOURNAL OF APPLIED PHYSICS   97 ( 10 )   10D503/1-3   2005.5

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  • Growth and magnetic properties of epitaxial MnAs/NiAs/MnAs hetero structures grown on exact GaAs(111)B substrates

    R Nakane, J Kondo, MW Yuan, S Sugahara, M Tanaka

    JOURNAL OF CRYSTAL GROWTH   278 ( 1-4 )   649 - 654   2005.5

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  • Current-Induced Magnetization Switching in epitaxial MnAs/NiAs/MnAs heterostructures

    NAKANE Ryosho, KONDO Jun, SUGAHARA Satoshi, TANAKA Masaaki

    2005 ( 12 )   13 - 18   2005.3

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  • スピントランジスタ

    菅原聡

    電子情報通信学会誌   88 ( 7 )   541 - 550   2005

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  • Spin Metal-Oxide-Semiconductor Field-Effect Transistors (Spin MOSFETs) for Spin-Electronic Integrated Circuits

    S. Sugahara

    IEE Proc. Circuits, Device-Systems   152 ( 4 )   355 - 365   2005

  • Precipitation of amorphous ferromagnetic semiconductor phase in epitaxially grown Mn-doped Ge thin films

    S Sugahara, KL Lee, S Yada, M Tanaka

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS   44 ( 46-49 )   L1426 - L1429   2005

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  • Effect of postgrowth annealing on the morphology and magnetic properties of MnAs thin films grown on GaAs(001) substrates

    R Nakane, S Sugahara, M Tanaka

    JOURNAL OF APPLIED PHYSICS   95 ( 11 )   6558 - 6561   2004.6

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  • 29pXH-4 Control of magnetism in III-V semiconductor heterostructures : Mn-delta doping and p-type selective doping

    Tanaka A. M., Nazmul M., Sugahara S.

    Meeting abstracts of the Physical Society of Japan   59 ( 1 )   974 - 974   2004.3

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    Language:Japanese   Publisher:The Physical Society of Japan (JPS)  

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  • A spin metal-oxide-semiconductor field-effect transistor using half-metallic-ferromagnet contacts for the source and drain

    S Sugahara, M Tanaka

    APPLIED PHYSICS LETTERS   84 ( 13 )   2307 - 2309   2004.3

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  • Control of ferromagnetism in Mn delta-doped GaAs-based semiconductor heterostructures

    Ahsan M. Nazmul, S. Kobayashi, S. Sugahara, M. Tanaka

    Physica E: Low-Dimensional Systems and Nanostructures   21 ( 2-4 )   937 - 942   2004.3

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  • Growth and magnetoresistance of epitaxial metallic MnAs/NiAs/MnAs trilayers on GaAs (001) substrates

    R Nakane, S Sugahara, M Tanaka

    PHYSICA E-LOW-DIMENSIONAL SYSTEMS & NANOSTRUCTURES   21 ( 2-4 )   991 - 995   2004.3

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  • Mn-Delta-Doped GaAs and Its Heterostructures : Ferromagnetic Transition Temperature and Control of Magnetic Properties

    TANAKA M., NAZMUL A. M., SUGAHARA S.

    Journal of Magnetics Society of Japan   28 ( 2 )   66 - 71   2004.2

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  • A spin MOSFET and its applications

    SUGAHARA S., TANAKA M.

    134   93 - 100   2004.1

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  • Epitaxial growth and magnetic properties of single-crystal MnAs/AlAs/MnAs magnetic tunnel junctions on exact (111)B GaAs substrates: the effect of ultrathin GaAs buffer layers

    S Sugahara, M Tanaka

    JOURNAL OF CRYSTAL GROWTH   251 ( 1-4 )   317 - 322   2003.4

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  • Tunneling Magneto-Resistance in Semiconductor-Based Epitaxial Ferromagnetic Heterostructures and Its Potential Applications

    TANAKA M., HIGO Y., SUGAHARA S.

    26   278 - 279   2002.9

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  • Properties of Mn δ-doped-GaAs-based Heterostructures and Their High Ferromagnetic Transition Temperature (-172K)

    NAZMUL Ahsan M., SUGAHARA Satoshi, TANAKA Masaaki

    2002 ( 28 )   17 - 21   2002.3

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  • Tunneling magnetoresistance in fully epitaxial MnAs/AlAs/MnAs ferromagnetic tunnel junctions grown on vicinal GaAs(111)B substrates

    S Sugahara, M Tanaka

    APPLIED PHYSICS LETTERS   80 ( 11 )   1969 - 1971   2002.3

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Presentations

  • ノンポーラ型抵抗変化素子を用いた不揮発性SRAM

    第56回応用物理学関連連合講演会  2009 

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  • Ferromagnetism in Epitaxially Grown Fe-Doped Ge Thin Films on Ge(001) Substrates

    17th Intl. Conf. on Magnetism (ICM-2006), Kyoto, Japan,  2006 

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  • 抵抗変化素子を用いたFunctional MOSFET/CMOS

    第56回応用物理学関連連合講演会  2009 

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  • Spin MOSFETs As a Basis for Silicon-Based Spin-Electronics

    4th Intl. Conf. on Physics and Application of Spin-Related Phenomena in Semiconductors (PASPS-IV), Sendai, Japan,  2006 

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  • SOI-Based Spin-Transistor Technologies

    2009 

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  • Comparative Study on Influence of Subband Structures on Electrical Characteristics of III-V Semiconductor, Ge and Si Channel n-MISFETs

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • Preparation and characterization of full-Heusler Co2FeSi alloy thin films on amorphous insulator films

    IEEE International Magnetics Conference (INTERMAG 09)  2009 

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  • スピン注入磁化反転MTJを用いた不揮発性Dフリップフロップ

    第56回応用物理学関係連合講演会  2009 

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  • Fabrication of III-V-O-I(III-V on Insulator) Structures on Si Using Micro-Channel Epitaxy with a Two-Step Growth Technique

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • Nonvolatile Logic Technologies for Green IT

    The 2009 International Meeting for Future of Electron Devices Kansai (IMFEDK)  2009 

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  • スピントランジスタの研究動向

    応用物理学会薄膜・表面物理分科会主催第34回薄膜・表面セミナー, 東京,  2006 

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  • 不純物偏析技術を用いたCo_2_FeSiソース/ドレインMOSFETの作製と評価

    第56回応用物理学関連連合講演会  2009 

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  • Si(001),Si(110),Si(111)基板上へのMnドープGe薄膜のエピタキシャル成長と磁性

    第68回応用物理学会学術講演会  2007 

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  • Spin-functional MOSFETs

    Intl. Symp. Silicon Nanodevices in 2030: Prospects by world's leading scientists  2009 

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  • Siキャップ層による強磁性Fe3Si薄膜形成温度の低温化

    第68回応用物理学会学術講演会  2007 

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  • Nonvolatile power-gating microprocessor concepts using nonvolatile SRAM and flip-flop

    International Symposium on Silicon Nano Devices in 2030  2009 

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  • Nonvolatile SRAM and flip-flop architectures using magnetic tunnel junctions with current-induced magnetization switching technology

    52nd Annual Conf. on Magnetism and Magnetic Materials  2007 

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    Presentation type:Poster presentation  

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  • Fabrication and characterization of pseudo-spin-MOSFETs

    Intl. Conf. Silicon Nano Devices in 2030  2009 

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  • Preparation of full-Heusler alloys on silicon-on-insulator substrates employing rapid thermal annealing

    52nd Annual Conference on Magnetism and Magnetic Materials (MMM2007)  2007 

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  • Analysis and design of nonvolatile SRAM using spintronics technology

    Non-volatile Memory Technology Symposium 2009 (NVMTS09)  2009 

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  • シリコン・スピンエレクトロニクス ~材料・デバイス・回路~

    日本半導体製造装置協会(SEAJ)講演会  2007 

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  • Half-metallic ferromagnet technologies for spin-functional MOSFETs

    Intl. Conf. “Silicon Nano Devices in 2030: Prospects by world’s leading scientists  2009 

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  • Effects of Atomic Hydrogen Annealing on Reduction of Leakage Current in Ultrathin Si/Ge/Si-On-Insulator Metal Source/Drain p-Channel MOSFETs

    4th International Symposium on Compound Semiconductors (ISCS2007)  2007 

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  • 非晶質絶縁膜上へのフルホイスラー合金Co_2_FeSiの形成と評価

    第13回半導体スピン工学の基礎と応用(PASPS-13)  2009 

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  • Effect of Annealing on (100) and (110) Oriented pseudo-GOI pMOSFETs Fabricated by Ge Condensation Method

    The 5th Intl. Symp. on Control of Semiconductor Interfaces -for Next Generation ULSI Process Integrations- (ISCSI-V)  2007 

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  • スピン機能MOSFETによる新しいエレクトロニクスの展開

    応用物理学会シリコンテクノロジー分科会第111回研究集会  2009 

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  • Comparative Study on Influence of Subband Structures on Electrical Characteristics of III-V Semiconductor, Ge and Si Channel n-MISFETs

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • Variability-Tolerant CMOS Gates Using Functional MOSFETs with Resistive Switching Devices

    Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials  2009 

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  • Crystallographic and magnetic properties of epitaxially grown Ge1-xFex thin films on Si(001) substrates

    52nd Annual Conf. on Magnetism and Magnetic Materials (MMM2007)  2007 

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  • 擬似スピンMOSFETを用いた不揮発性SRAMの提案と解析

    第13回半導体スピン工学の基礎と応用(PASPS-13)  2009 

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  • Superior MOS Interface Properties of GeO2/Ge Structures Fabricated by Ozone Oxidation

    The 5th Intl. Symp. on Control of Semiconductor Interfaces -for Next Generation ULSI Process Integrations- (ISCSI-V)  2007 

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  • Analysis and Design of Nonvolatile SRAM Using MOSFET-Based Spin-Transistors

    Intermag 2009  2009 

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  • Si(001)基板上にエピタキシャル成長した強磁性半導体Ge1-xFex薄膜の結晶性と磁性

    第68回応用物理学会学術講演会  2007 

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  • Nonvolatile SRAM(NV-SRAM) Using Functional MOSFET Merged with Resistive Switching Devices

    Proceedings of IEEE 2009 Custom Integrated Circuits Conference (CICC)  2009 

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  • シリコン・スピンエレクトロニクス -材料・デバイス・回路-

    第10回シリサイド系半導体研究会夏の学校, 掛川,  2007 

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  • Germanium-on-insulator (GOI)基板を用いたホイスラー合金の作製とその評価

    第68回応用物理学会学術講演会  2007 

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  • 強磁性トンネル接合を用いたpseudo spin-MOSFETの提案と理論解析

    第68回応用物理学会学術講演会  2007 

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  • Dependence of Layer Thickness on Magnetism and Electrical Conduction in Ferromagnetic (In,Mn)As/GaSb Heterostructures

    Narrow Gap Semiconductors 2007  2007 

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  • RTAを用いた非晶質絶縁膜上へのホイスラー合金の形成とその評価

    第68回応用物理学会学術講演会  2007 

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  • Preparation and characterization of full-Heusler Co2FeSi alloy thin films on amorphous insulator films

    IEEE International Magnetics Conference (INTERMAG 09)  2009 

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  • 酸化濃縮法で作成された(110)面GOI基板ヘのアニール効果

    第68回応用物理学会学術講演会  2007 

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  • Nonvolatile delay flip-flop using magnetic tunnel junctions with current-induced magnetization switching architecture

    IEEE International Magnetics Conference  2009 

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  • 微小孔を介したSi 基板上InGaAs 成長におけるモフォロジー向上

    第68回応用物理学会学術講演会  2007 

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  • Variability-Tolerant CMOS Gates Using Functional MOSFETs with Resistive Switching Devices

    Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials  2009 

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  • pseudo spin-MOSFET/spin-MOSFETの不揮発性SRAM/ラッチ回路への応用

    第68回応用物理学会学術講演会  2007 

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  • Nonvolatile Logic Technologies for Green IT

    The 2009 International Meeting for Future of Electron Devices Kansai (IMFEDK)  2009 

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  • スピン注入磁化反転MTJを用いた不揮発性SRAM/ラッチ回路

    第68回応用物理学会学術講演会  2007 

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  • Structural and Magnetic Properties of Self-Organized Ge1-xMnx Nanocolumns in Epitaxially Grown Mn-Doped Ge Thin Films

    4th Intl. School and Conference on Spintronics and Quantum Information Technology (Spintech IV), Maui, Hawaii, USA,  2007 

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  • Gate Dielectric Formation and MIS Interface Characterization on Ge

    The 15th Biennial Conf. on Insulatring Films on Semiconductors (INFOS2007), Athene, Greece,  2007 

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  • III-V族化合物半導体n-MOSFETとSi・Ge n-MOSFETの電流駆動力の比較

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • Silicon-on-insulator (SOI) 基板を用いたホイスラー合金の作製とその磁性評価

    第54回応用物理学関係連合講演会  2007 

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  • 酸化濃縮法により作製された超薄膜(110)面GOI p-MOSFET

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • GOI(Ge-On-Insulater)MOSチャネル中の正孔の速度-電界特性

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • (110) Ultra-thin GOI p-MOSFETs Fabricated by Ge Condensation Method

    The 5th International Conference on SiGe(C) Epitaxy and Heterostructures (ICSI-5), Marseille, France,  2007 

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  • Magneto-Optical and Magneto-Transport Properties of Ferromagnetic Ge1-xFex Thin Films Grown on Si (001) Substrates

    4th Intl. School and Conference on Spintronics and Quantum Information Technology (Spintech IV), Maui, Hawaii, USA,  2007 

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  • Perspective on Spin-Transistor Electronics

    The 2007 International Meeting for Future of Electron Devices Kansai, Osaka, Japan,  2007 

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  • Perspective on Si-Based Spin-Transistor Electronics

    3rd Intl. Nanotechnology Conf. on Communication and Cooperation (INC3), Brussels, Belgium,  2007 

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  • 低温コンダクタンス法によるSiO2/Ge MIS界面準位の特性評価

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • Ge上極薄Siのプラズマ酸化によるSiO2/Ge MISキャパシタの電気特性

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • オゾン酸化及び熱酸化により作製されたGe酸化膜/Ge MOS構造の電気特性

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • RTAを用いて作製したフルホイスラー合金Co_2_FeSi、Co_2_FeGeの構造

    第55回応用物理学会関連連合講演会  2008 

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  • 強磁性半導体Ge_1-x_Fe_x_薄膜におけるアニール効果

    第55回応用物理学関係連合講演会  2008 

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  • 間接遷移型の障壁層を含むAlGaAs-GaAsヘテロ構造におけるスピン輸送

    2008年春季第55回応用物理学関係連合講演会  2008 

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  • 酸化濃縮法による(110)面超薄膜GOIpMOSFETデバイス作製

    第68回応用物理学会学術講演会  2008 

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  • メタルソース・ドレインnチャネルGOI MOSFETのチャネル電子移動度測定

    第55回応用物理学関係連合講演会  2008 

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  • GOI pMOSFETの正孔反転層における移動度の評価

    第55回応用物理学関係連合講演会  2008 

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  • スピン注入磁化反転MTJを用いた不揮発性SRAM:通常動作時消費電力の削減

    第69回応用物理学会学術講演会  2008 

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  • スピンMOSFET を用いたスピントランジスタ・エレクトロニクス

    第69回応用物理学会学術講演会  2008 

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  • Spin transport across depletion region and energy barriers in GaAs-AlGaAs heterostructures

    5th Intern’l Conf. on Physics and Applications of Spin-related Phenomena in Semiconductors (PASPS-V)  2008 

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  • Spin transport across indirect gap barriers in GaAs-AlGaAs heterostructures

    The 2008 Intern’l Conf. on Solid State Devices and Materials  2008 

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  • Formation of Si- and Ge-based Full-Heusler Alloy Thin Films Using SOI and GOI Substrates for the Half-Metallic Source and Drain of Spin Transistors

    Pacific Rim Meeting on Electrochemical and Solid-State Science (PRiME2008)  2008 

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  • Novel nonvolatile SRAM architecture using MOSFET-based spin-transistors

    53rd Annual Conference on Magnetism and Magnetic Materials (MMM2008)  2008 

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  • Analysis and design of nonvolatile SRAM using magnetic tunnel junctions with current-induced magnetization switching technology

    53rd Annual Conference on Magnetism and Magnetic Materials (MMM2008)  2008 

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  • Germanium-based ferromagnetic semiconductor Ge1-xFex for silicon spintronics

    Hawaii, USA  2008 

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  • Analysis of L2_1_-ordering in full-Heusler Co_2_FeSi alloy thin films formed by rapid thermal annealing

    53rd Annual Conference on Magnetism and Magnetic Materials (MMM2008)  2008 

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  • スピン機能MOSFETとその高機能ロジックへの展開-電荷とスピンの融合による新しい高性能・高機能集積回路技術-

    JST Innovation Bridge  2008 

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  • スピン注入磁化反転MTJを用いた不揮発性SRAM:仮想接地セルアーキテクチャ

    第55回応用物理学会関連連合講演会  2008 

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  • スピン注入磁化反転MTJを用いたpseudo-spin-MOSFETの動作解析

    第55回応用物理学関係連合講演会  2008 

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  • スピンMOSFETとその高機能ロジックへの応用

    STRJワークショップ2007  2008 

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  • スピン注入磁化反転MTJを用いた不揮発性SRAM:Vhalfの影響

    第55回応用物理学会関連連合講演会  2008 

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  • Ge1-xMnx薄膜の成長速度制御による相分離抑止エピタキシャル成長とその磁性

    第67回応用物理学会学術講演会, 草津,  2006 

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  • Analysis and design of nonvolatile SRAM using spintronics technology

    Non-volatile Memory Technology Symposium 2009 (NVMTS09)  2009 

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  • エピタキシャル強磁性半導体Ge1-xFex薄膜の結晶性および磁性

    第53回応用物理学関係連合講演会, 東京,  2006 

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  • Half-metallic ferromagnet technologies for spin-functional MOSFETs

    Intl. Conf. “Silicon Nano Devices in 2030: Prospects by world’s leading scientists  2009 

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  • Silicon-on-snsulator (SOI) 基板上の強磁性Fe1-xSix薄膜の磁性と構造評価

    第53回応用物理学関係連合講演会, 東京,  2006 

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  • 超薄膜(110)面GOI p型MOSFETの電気的特性

    平成21年秋季 第70回応用物理学会学術講演会  2009 

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  • 強磁性半導体Ge1-xFexにおける結晶構造と強磁性との相関

    第67回応用物理学会学術講演会, 草津,  2006 

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  • Spin-functional MOSFETs

    Intl. Symp. Silicon Nanodevices in 2030: Prospects by world's leading scientists  2009 

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  • IV族ベース・スピントロニクスデバイスと再構成可能な論理回路

    第67回応用物理学会学術講演会, 草津,  2006 

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  • スピン機能MOSFETとその集積回路応用

    日本磁気学会第168回研究会第26回スピンエレクトロニクス専門研究会  2009 

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  • ひずみSi MOSFETのゲート トンネル電流に与えるひずみの効果

    第53回応用物理学関係連合講演会, 東京,  2006 

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  • Operating analysis of pseudo-spin-MOSFETs using MTJ with current-induced magnetization switching

    The 55th Spring Meeting, 2008; The Japan Society of Applied Physics and Related Scieties  2008 

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  • オーミックコンタクト合金を用いたメタル・ソース/ドレインMOSFET

    第53回応用物理学関係連合講演会, 東京,  2006 

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  • Nonvolatile power-gating microprocessor concepts using nonvolatile SRAM and flip-flop

    International Symposium on Silicon Nano Devices in 2030  2009 

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  • III-V on insulator (III-V-OI)MOSFET応用に向けたSi基板上のIII-V族化合物半導体エピタキシャル成長法

    第53回応用物理学関係連合講演会, 東京,  2006 

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  • Fabrication and characterization of pseudo-spin-MOSFETs

    Intl. Conf. Silicon Nano Devices in 2030  2009 

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  • III-V族化合物半導体n-MOSFETの電気特性の比較

    第53回応用物理学関係連合講演会, 東京,  2006 

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  • Spin transport across depletion region and energy barriers in GaAs-AlGaAs heterostructures

    5th Intern’l Conf. on Physics and Applications of Spin-related Phenomena in Semiconductors (PASPS-V)  2008 

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  • 低温MBE成長を用いた超薄膜Ge-on-insulator (GOI) p-channel メタルS/D MOSFET

    第53回応用物理学関係連合講演会, 東京,  2006 

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  • Spin transport across indirect gap barriers in GaAs-AlGaAs heterostructures

    The 2008 Intern’l Conf. on Solid State Devices and Materials  2008 

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  • Analysis and Design of Nonvolatile SRAM Using MOSFET-Based Spin-Transistors

    Intermag 2009  2009 

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  • Fabrication of SiO2/Ge MIS Structures by Plasma Oxidation of Ultrathin Si Films Grown on Ge

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • スピントランジスタによる新しいエレクトロニクスの展開

    電子情報通信学会シリコン材料・デバイス研究会(SDM) テーマ:低電圧/低消費電力技術、新デバイス・回路とその応用  2009 

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  • Ferromagnetism in Epitaxially Grown Fe-Doped Ge Thin Films on Ge(001) Substrates

    17th Intl. Conf. on Magnetism (ICM-2006), Kyoto, Japan,  2006 

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  • Ultra-Thin Ge-on-Insulator(GOI) Metal S/D p-Channel MOSFETs Fabricated by Low Temperature MBE Growth

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • Nonvolatile delay flip-flop using magnetic tunnel junctions with current-induced magnetization switching architecture

    IEEE International Magnetics Conference  2009 

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  • Effect of Tensile Strain on Gate and Substrate Currents of Strained-Si n-MOSFETs

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • マイクロプロセッサにおけるエマージングメモリデバイスへの期待

    第70回応用物理学会学術講演会  2009 

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  • Structural and Magnetic Properties of Ferromagnetic Semiconductor Ge1-xFex Thin Films Grown by LT-MBE

    4th Intl. Conf. on Physics and Application of Spin-Related Phenomena in Semiconductors (PASPS-IV), Sendai, Japan,  2006 

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  • Nonvolatile SRAM(NV-SRAM) Using Functional MOSFET Merged with Resistive Switching Devices

    Proceedings of IEEE 2009 Custom Integrated Circuits Conference (CICC)  2009 

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  • スピントランジスタ

    日本応用磁気学会第145回研究会, 東京,  2006 

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  • エマージングメモリデバイスとCMOSの機能融合による新しいコンピュータアーキテクチャの基礎:イントロダクトリートーク

    平成21年秋季 第70回応用物理学会学術講演会  2009 

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  • Spin MOSFETs As a Basis for Silicon-Based Spin-Electronics

    4th Intl. Conf. on Physics and Application of Spin-Related Phenomena in Semiconductors (PASPS-IV), Sendai, Japan,  2006 

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  • Spin-RAM/ReRAM技術を用いた機能MOSFETとその不揮発性SRAM/フリップフロップへの応用

    平成21年秋季 第70回応用物理学会学術講演会  2009 

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  • Ferromagnetism in Mn-Doped Amorphous Ge Thin Films

    4th Intl. Conf. on Physics and Application of Spin-Related Phenomena in Semiconductors (PASPS-IV), Sendai, Japan,  2006 

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  • 擬似スピンMOSFETを用いた不揮発性DFF:バルーンDFFとの比較

    第70回応用物理学会学術講演会  2009 

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  • Co線源X線回折を用いたフルホイスラー合金の不規則構造評価法の提案

    第70回応用物理学会学術講演会  2009 

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  • GeおよびSi基板上への強磁性半導体Ge1-xFex薄膜のエピタキシャル成長

    第11回「半導体スピン工学の基礎と応用」研究会, 柏,  2006 

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  • 擬似スピンMOSFETを用いた不揮発性SRAM:電源遮断動作消費電力の評価

    平成21年秋季 第70回応用物理学会学術講演会  2009 

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  • (110)面SiGe/SOI構造の酸化濃縮による(110)GOI基板の作製

    2006 

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  • Structural and Magnetic Properties of Ferromagnetic Semiconductor Ge1-xFex Thin Films Grown by LT-MBE

    4th Intl. Conf. on Physics and Application of Spin-Related Phenomena in Semiconductors (PASPS-IV), Sendai, Japan,  2006 

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  • スピントランジスタ

    応用物理学会スピンエレクトロニクス研究会, 東京,  2005 

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  • スピン素子の現状と今後の展望

    電気学会「超微細・低電力デバイス集積技術調査専門委員会」「超高速デバイス・回路技術調査専門委員会」合同調査専門委員会, 東京,  2005 

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  • Spin MOSFETs using ferromagnetic Schottky barrier contacts for the source and drain

    63rd Device Research Conf. (DRC), Santa Barbara, USA,  2005 

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  • Spin MOSFETs for Integrated Spin-Electronics

    6th Intl Workshop on Future Information Processing Technologies (IWFIPT), Asheville, USA,  2005 

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  • Examination of the Universality of Hole Mobility in Strained-Si p-MOSFETs

    2005 Intl. Conf. on Solid State Devices and Materials (SSDM2005), Kobe, Japan,  2005 

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  • Ferromagnetism in Epitaxially Grown Ge1-xMnx Thin Films on Ge(001) substrates

    The 3rd Intl. School and Conf. on Spintronics and Quantum Information Technology (Spintech III), Awaji Island, Japan,  2005 

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  • Epitaxial Growth and Magnetic Properties of a New Group IV Ferromagnetic Semiconductor Ge1-xFex

    50th Annual Conf. on Magnetism and magnetic materials (MMM2005), San Jose, USA,  2005 

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  • MOSFET Type of Spin Transistor As a Beyond-CMOS Device Using Spin Degrees of Freedom

    2005 Intl Conf. on Solid State Devices and Materials (SSDM2005), Kobe, Japan,Rump session: Beyond the Scaling Limit-Innovative Devices and Materials-,  2005 

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  • Formation and Characterization of Ferromagnetic Silicide Fe1-xSix for Si-Based Spintronic Devices

    47th Annual TMS Electronic Materials Conf. (EMC), Santa Barbara, USA,  2005 

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  • Current-Induced Magnetization Switching in Epitaxial MnAs/NiAs/MnAs Heterostructures on GaAs Substrates

    The 3rd Intl. School and Conf. on Spintronics and Quantum Information Technology (Spintech III), Awaji Island, Japan,  2005 

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  • Spin MOSFETs As a Basis for Integrated Spin Electronics

    5th IEEE conf. on Nanotechnology (IEEE-NANO 2005), Nagoya, Japan,  2005 

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  • Fabrication of III-V-O-I(III-V on Insulator) Structures on Si Using Micro-Channel Epitaxy with a Two-Step Growth Technique

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • Preparation of Ferromagnetic Silicide Fe1-xSix Using Silicon-on-Insulator Substrates for Si-Based Spin-Electronic Devices

    50th Annual Conf. on Magnetism and magnetic materials (MMM2005), San Jose, USA,  2005 

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  • Ge上極薄膜Siのプラズマ酸化によるSiO2/Ge MISキャパシタの作製と界面特性評価

    応用物理学会薄膜・表面物理分科会シリコンテクノロジー分科会共催特別研究会「ゲートスタック研究会―材料・プロセス・評価の物理―」第11回研究会, 三島,  2006 

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  • 原子状水素アニールによるSi/Ge/SOI構造メタルS/D pMOSFETの特性改善

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • Si上高品質III/V族化合物半導体薄膜形成に向けたMOVPEバッファ層の初期成長過程観察

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • Epitaxial Growth and Properties of Ferromagnetic Ge1-xFex Thin Films on Si (001)

    10th Joint MMM/Intermag Conference, Baltimore, USA,  2007 

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  • Si(001)基板上への強磁性半導体Ge1-xFex薄膜のMBE成長と評価

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • エピタキシャル成長した強磁性Ge1-xMnx薄膜の構造と磁性の評価

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • Si基板上へのInGaAsの成長におけるInPバッファーの有効性

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • シリコン中へのスピン注入とデバイス応用

    第54回応用物理学関係連合講演会, 相模原,  2007 

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  • Effect of Annealing on (100) and (110) Oriented pseudo-GOI pMOSFETs Fabricated by Ge Condensation Method

    The 5th Intl. Symp. on Control of Semiconductor Interfaces -for Next Generation ULSI Process Integrations- (ISCSI-V)  2007 

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  • Kinetically-Controlled Epitaxial Growth of Ferromagnetic Ge1-xMnx Thin Films

    10th Joint MMM/Intermag Conference, Baltimore, USA,  2007 

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  • Crystallographic and magnetic properties of epitaxially grown Ge1-xFex thin films on Si(001) substrates

    52nd Annual Conf. on Magnetism and Magnetic Materials (MMM2007)  2007 

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  • Superior MOS Interface Properties of GeO2/Ge Structures Fabricated by Ozone Oxidation

    The 5th Intl. Symp. on Control of Semiconductor Interfaces -for Next Generation ULSI Process Integrations- (ISCSI-V)  2007 

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  • Proposal and theoretical analysis of pseudo spin-MOSFETs using MTJ devices

    The 68th Autumn Meeting, 2007; The Japan Society of Applied Physics  2007 

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  • Application of pseudo spin-MOSFET/spin-MOSFET for non-volatile SRAM/latch circuits

    The 68th Autumn Meeting, 2007; The Japan Society of Applied Physics  2007 

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  • Nonvolatile SRAM and flip-flop architectures using magnetic tunnel junctions with current-induced magnetization switching technology

    52nd Annual Conf. on Magnetism and Magnetic Materials  2007 

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  • Preparation of full-Heusler alloys on silicon-on-insulator substrates employing rapid thermal annealing

    52nd Annual Conference on Magnetism and Magnetic Materials (MMM2007)  2007 

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  • Non-volatile SRAM/latch circuits using MTJ devices with spin transfer torque magnetization switching

    The 68th Autumn Meeting, 2007; The Japan Society of Applied Physics  2007 

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  • Effects of Atomic Hydrogen Annealing on Reduction of Leakage Current in Ultrathin Si/Ge/Si-On-Insulator Metal Source/Drain p-Channel MOSFETs

    4th International Symposium on Compound Semiconductors (ISCS2007)  2007 

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  • Structural and Magnetic Properties of Self-Organized Ge1-xMnx Nanocolumns in Epitaxially Grown Mn-Doped Ge Thin Films

    4th Intl. School and Conference on Spintronics and Quantum Information Technology (Spintech IV), Maui, Hawaii, USA,  2007 

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  • Mn delta-doped GaAs/p-AlGaAs Heterostructures with High Curie Temperature and Its Control

    The 13th International Conference on Molecular Beam Epitaxy (MBE-2004)  2004 

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  • Gate Dielectric Formation and MIS Interface Characterization on Ge

    The 15th Biennial Conf. on Insulatring Films on Semiconductors (INFOS2007), Athene, Greece,  2007 

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  • Mn デルタドープGaAsをベースとした半導体へテロ構造における高温強磁性とその制御

    第51回春季応用物理学関係連合講演会  2004 

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  • (110) Ultra-thin GOI p-MOSFETs Fabricated by Ge Condensation Method

    The 5th International Conference on SiGe(C) Epitaxy and Heterostructures (ICSI-5), Marseille, France,  2007 

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  • Mn delta-doped GaAs/p-AlGaAs Heterostructures with High Curie Temperature and Its Control

    The 13th International Conference on Molecular Beam Epitaxy (MBE-2004)  2004 

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  • Magneto-Optical and Magneto-Transport Properties of Ferromagnetic Ge1-xFex Thin Films Grown on Si (001) Substrates

    4th Intl. School and Conference on Spintronics and Quantum Information Technology (Spintech IV), Maui, Hawaii, USA,  2007 

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  • External Control of Ferromagnetism in Mn delta-doped GaAs-based Heterostructures

    9th Joint MMM-Intermag Conference (MMM-2004)  2004 

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  • Dependence of Layer Thickness on Magnetism and Electrical Conduction in Ferromagnetic (In,Mn)As/GaSb Heterostructures

    Narrow Gap Semiconductors 2007  2007 

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  • Current-Induced Magnetization Switching in Epitaxial MnAs/NiAs/MnAs Heterostructures on GaAs Substrates

    The 3rd Intl. School and Conf. on Spintronics and Quantum Information Technology (Spintech III), Awaji Island, Japan,  2005 

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  • Analysis and design of nonvolatile SRAM using magnetic tunnel junctions with current-induced magnetization switching technology

    53rd Annual Conference on Magnetism and Magnetic Materials (MMM2008)  2008 

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  • Spin MOSFETs As a Basis for Integrated Spin Electronics

    5th IEEE conf. on Nanotechnology (IEEE-NANO 2005), Nagoya, Japan,  2005 

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  • Perspective on Spin-Transistor Electronics

    The 2007 International Meeting for Future of Electron Devices Kansai, Osaka, Japan,  2007 

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  • Spin MOSFETs for Integrated Spin-Electronics

    6th Intl Workshop on Future Information Processing Technologies (IWFIPT), Asheville, USA,  2005 

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  • Perspective on Si-Based Spin-Transistor Electronics

    3rd Intl. Nanotechnology Conf. on Communication and Cooperation (INC3), Brussels, Belgium,  2007 

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  • External Control of Ferromagnetism in Mn delta-doped GaAs-based Heterostructures

    9th Joint MMM-Intermag Conference (MMM-2004)  2004 

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  • Kinetically-Controlled Epitaxial Growth of Ferromagnetic Ge1-xMnx Thin Films

    10th Joint MMM/Intermag Conference, Baltimore, USA,  2007 

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  • Formation and Characterization of Ferromagnetic Silicide Fe1-xSix for Si-Based Spintronic Devices

    47th Annual TMS Electronic Materials Conf. (EMC), Santa Barbara, USA,  2005 

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  • Epitaxial Growth and Properties of Ferromagnetic Ge1-xFex Thin Films on Si (001)

    10th Joint MMM/Intermag Conference, Baltimore, USA,  2007 

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  • Spin MOSFETs using ferromagnetic Schottky barrier contacts for the source and drain

    63rd Device Research Conf. (DRC), Santa Barbara, USA,  2005 

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  • Formation of Si- and Ge-based Full-Heusler Alloy Thin Films Using SOI and GOI Substrates for the Half-Metallic Source and Drain of Spin Transistors

    Pacific Rim Meeting on Electrochemical and Solid-State Science (PRiME2008)  2008 

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  • MOSFET Type of Spin Transistor As a Beyond-CMOS Device Using Spin Degrees of Freedom

    2005 Intl Conf. on Solid State Devices and Materials (SSDM2005), Kobe, Japan,Rump session: Beyond the Scaling Limit-Innovative Devices and Materials-,  2005 

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  • Germanium-based ferromagnetic semiconductor Ge1-xFex for silicon spintronics

    Hawaii, USA  2008 

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  • Examination of the Universality of Hole Mobility in Strained-Si p-MOSFETs

    2005 Intl. Conf. on Solid State Devices and Materials (SSDM2005), Kobe, Japan,  2005 

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  • スピン機能MOSFETを用いた不揮発性高機能・高性能ロジック

    応用物理学会応用電子物性分科会・スピントロニクス研究会例会  2008 

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  • Preparation of Ferromagnetic Silicide Fe1-xSix Using Silicon-on-Insulator Substrates for Si-Based Spin-Electronic Devices

    50th Annual Conf. on Magnetism and magnetic materials (MMM2005), San Jose, USA,  2005 

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  • スピン機能MOSFETによるスピントランジスタ・エレクトロニクス

    応用物理学会応用電子物性分科会・スピントロニクス研究会共同主催研究会  2008 

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  • Epitaxial Growth and Magnetic Properties of a New Group IV Ferromagnetic Semiconductor Ge1-xFex

    50th Annual Conf. on Magnetism and magnetic materials (MMM2005), San Jose, USA,  2005 

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  • Analysis of L2_1_-ordering in full-Heusler Co_2_FeSi alloy thin films formed by rapid thermal annealing

    53rd Annual Conference on Magnetism and Magnetic Materials (MMM2008)  2008 

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  • Ferromagnetism in Epitaxially Grown Ge1-xMnx Thin Films on Ge(001) substrates

    The 3rd Intl. School and Conf. on Spintronics and Quantum Information Technology (Spintech III), Awaji Island, Japan,  2005 

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  • Novel nonvolatile SRAM architecture using MOSFET-based spin-transistors

    53rd Annual Conference on Magnetism and Magnetic Materials (MMM2008)  2008 

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  • CrドープSi薄膜のエピタキシャル成長と磁性評価

    第52回応用物理学関係連合講演会, さいたま,  2005 

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  • 非晶質絶縁膜上に形成したフルホイスラー合金Co_2_FeSiの結晶構造評価

    第69回応用物理学会学術講演会  2008 

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  • ひずみSi p-MOSFETにおける反転層正孔移動度のユニバーサリティ

    第52回応用物理学関係連合講演会, さいたま,  2005 

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  • 化濃縮法で作成された超薄膜(110)面GOIp-MOSFETの電気的特性

    第69回応用物理学会学術講演会  2008 

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  • SiN/Ge MIS キャパシタのCV特性に与える基板タイプの影響

    第52回応用物理学関係連合講演会, さいたま,  2005 

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  • シリコンMOS反転層へのスピン注入とスピンMOSFETへの応用

    第69回応用物理学会学術講演会  2008 

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  • 強磁性金属-Si接合におけるショットキー障壁高さの評価

    第52回応用物理学関係連合講演会, さいたま,  2005 

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  • RTAによって作製したフルホイスラー合金Co_2_FeSiの規則度

    第69回応用物理学会学術講演会  2008 

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  • Ge系MOSトランジスタへの期待

    第52回応用物理学関係連合講演会, さいたま,  2005 

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  • Silicon-on-snsulator (SOI) 基板を用いた強磁性Fe1-xSixの作製と磁気特性

    第66回応用物理学会学術講演会, 徳島,  2005 

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  • Ge上薄膜Siのプラズマ酸化によるSiO2/Ge MISキャパシタの作製と電気特性

    第66回応用物理学会学術講演会, 徳島,  2005 

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  • 強磁性Ge1-xMnx薄膜のエピタキシャル成長と磁気特性

    第66回応用物理学会学術講演会, 徳島,  2005 

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  • アモルファスGe1-xMnx薄膜の磁性評価

    第66回応用物理学会学術講演会, 徳島,  2005 

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  • 強磁性Fe1-xSixをショットキー・ソース/ドレインに用いたスピンMOSFETの作製

    第52回応用物理学関係連合講演会, さいたま,  2005 

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  • Ge(100)基板上にエピタキシャル成長したMnドープGe薄膜における強磁性の起源

    第52回応用物理学関係連合講演会, さいたま,  2005 

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  • Pseudo-spin-MOSFETを用いた不揮発性SRAM:情報ストア動作解析

    第56回応用物理学関連連合講演会  2009 

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  • Effect of Tensile Strain on Gate and Substrate Currents of Strained-Si n-MOSFETs

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • 極薄絶縁膜上へのフルホイスラー合金Co_2_FeSiの形成とその評価

    第56回応用物理学関連連合講演会  2009 

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  • Fabrication of SiO2/Ge MIS Structures by Plasma Oxidation of Ultrathin Si Films Grown on Ge

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • Ultra-Thin Ge-on-Insulator(GOI) Metal S/D p-Channel MOSFETs Fabricated by Low Temperature MBE Growth

    2006 Intl. Conf. on Solid State Devices and Materials (SSDM 2006), Yokohama, Japan,  2006 

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  • ノンポーラ型抵抗変化素子のSPICEモデル

    第56回応用物理学関連連合講演会  2009 

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  • Ferromagnetism in Mn-Doped Amorphous Ge Thin Films

    4th Intl. Conf. on Physics and Application of Spin-Related Phenomena in Semiconductors (PASPS-IV), Sendai, Japan,  2006 

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  • 酸化濃縮法を用いたGe PDとGe-on-Insulator MOSFETの集積化の検討

    第56回応用物理学関連連合講演会  2009 

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