Narrow Fingerprint Template Synthesis by Clustering Minutiae Descriptors Reviewed

Zhiqiang Hu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS   E100D ( 6 )   1290 - 1302   2017.6

Hybrid Minutiae Descriptor for Narrow Fingerprint Verification Reviewed

Zhiqiang Hu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS   E100D ( 3 )   546 - 555   2017.3

An accurate and fast trace-aware performance estimation model for prioritized MPSoC bus with multiple interfering bus-masters Reviewed

Farhan Shafiq, Tsuyoshi Isshiki, Dongju Li

IPSJ Transactions on System LSI Design Methodology   10   13 - 27   2017.2

Hybrid shared-memory and message-passing multiprocessor system-on-chip for UWB MAC layer Reviewed

Hao Xiao, Busheng Zheng, Tsuyoshi Isshiki, Hiroaki Kunieda

IET COMPUTERS AND DIGITAL TECHNIQUES   11 ( 1 )   8 - 15   2017.1

Fingerprint Spoof Detection using Wavelet based Local Binary Pattern Reviewed

Supawan Kumpituck, Dongju Li, Hiroaki Kunieda, Tsuyoshi Isshiki

EIGHTH INTERNATIONAL CONFERENCE ON GRAPHIC AND IMAGE PROCESSING (ICGIP 2016)   10225   2017

Efficient Synchronization for Distributed Embedded Multiprocessors Reviewed

Hao Xiao, Ning Wu, Fen Ge, Tsuyoshi Isshiki, Hiroaki Kunieda, Jun Xu, Yuangang Wang

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS   24 ( 2 )   779 - 783   2016.2

A fast trace aware statistical based prediction model with burst traffic modeling for contention stall in a priority based MPSoC bus Reviewed

Farhan Shafiq, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

IPSJ Transactions on System LSI Design Methodology   9   37 - 48   2016

Fingerprint Authentication on Touch Sensor using Phase-Only Correlation Method Reviewed

Nabilah Shabrina, Tsuyoshi Isshiki, Hiroaki Kunieda

7TH INTERNATIONAL CONFERENCE ON INFORMATION COMMUNICATION TECHNOLOGY FOR EMBEDDED SYSTEMS 2016 (IC-ICTES 2016)   85 - 89   2016

A Design Method for Real-Time Image Denoising Circuit using High-Level Synthesis Reviewed

Ikumi Endo, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

7TH INTERNATIONAL CONFERENCE ON INFORMATION COMMUNICATION TECHNOLOGY FOR EMBEDDED SYSTEMS 2016 (IC-ICTES 2016)   30 - 35   2016

An Efficient Embedded Processor for Object Detection Using ASIP Methodology Reviewed

Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

2016 IEEE 27TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP)   225 - 226   2016

Design of an Efficient ASIP-Based Processor for Object Detection Using AdaBoost Algorithm Reviewed

Shanlin Xiao, Dongju Li, Hiroaki Kunieda, Tsuyoshi Isshiki

7TH INTERNATIONAL CONFERENCE ON INFORMATION COMMUNICATION TECHNOLOGY FOR EMBEDDED SYSTEMS 2016 (IC-ICTES 2016)   96 - 99   2016

Register-Based Process Virtual Machine Acceleration Using Hardware Extension with Hybrid Execution Reviewed

Surachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E98A ( 12 )   2505 - 2518   2015.12

Efficient design exploration framework of SW/HW systems based on tightly-coupled thread model Reviewed

Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

IPSJ Transactions on System LSI Design Methodology   8   38 - 50   2015.2

Online Detection of Spoof Fingers for Smartphone-based Applications Reviewed

Dongju Li, Hiroaki Kunieda, Supawan Kumpituck, Tsuyoshi Isshiki

2015 IEEE 17TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, 2015 IEEE 7TH INTERNATIONAL SYMPOSIUM ON CYBERSPACE SAFETY AND SECURITY, AND 2015 IEEE 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (ICESS)   1292 - 1297   2015

Branch Bitstream Machine Instruction-level System Tracing Reviewed

Pipat Methavanitpong, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

2015 6TH INTERNATIONAL CONFERENCE OF INFORMATION AND COMMUNICATION TECHNOLOGY FOR EMBEDDED SYSTEMS (IC-ICTES)   2015

SIFT-based Algorithm for Fingerprint authentication on smartphone Reviewed

Masao Yamazaki, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

2015 6TH INTERNATIONAL CONFERENCE OF INFORMATION AND COMMUNICATION TECHNOLOGY FOR EMBEDDED SYSTEMS (IC-ICTES)   2015

C-Based RTL Design Method for Circuit Switched Network on Chips Reviewed

Kensuke Fujiya, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

2015 6TH INTERNATIONAL CONFERENCE OF INFORMATION AND COMMUNICATION TECHNOLOGY FOR EMBEDDED SYSTEMS (IC-ICTES)   2015

Dalvik bytecode acceleration using fetch/decode hardware extension Reviewed

Surachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

Journal of Information Processing   23 ( 2 )   118 - 130   2015

Retargeting Derivative-ASIP with Assembly Converter Tool Reviewed

Agus Bejo, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS   E97D ( 5 )   1188 - 1195   2014.5

Distributed synchronization for message-passing based embedded multiprocessors Reviewed

Hao Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Guanyu Zhu

Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors   82 - 83   2014

Dalvik Bytecode Acceleration Using Fetch/Decode Hardware Extension With Hybrid Execution Reviewed

Surachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS)   375 - 378   2014

Distributed Synchronization for Message-passing based Embedded Multiprocessors Reviewed

Hao Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Guanyu Zhu

PROCEEDINGS OF THE 2014 IEEE 25TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2014)   82 - +   2014

Custom Instruction Search for Application Specific Instruction-Set Processor using Guided Simulated Annealing Reviewed

Amr Fathy, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS)   367 - 370   2014

A method of software development tool and hardware generation for ASIP with a co-processor based on the derivative ASIP approach Reviewed

Agus Bejo, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

Journal of Information Processing   22 ( 2 )   131 - 141   2014

A Design of High Performance Parallel Architecture and Communication for Multi-ASIP Based Image Processing Engine Reviewed

Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E96A ( 6 )   1222 - 1235   2013.6

Flexible and high performance ASIPs for pixel level image processing and two dimensional image processing Reviewed

Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

Journal of Information Processing   21 ( 3 )   552 - 562   2013

A High Level Design of Reconfigurable and High-Performance ASIP Engine for Image Signal Processing Reviewed

Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E95A ( 12 )   2373 - 2383   2012.12

A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer Reviewed

Hao Xiao, Tsuyoshi Isshiki, Arif Ullah Khan, Dongju Li, Hiroaki Kunieda, Yuko Nakase, Sadahiro Kimura

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS   E95D ( 8 )   2027 - 2038   2012.8

Narrow Fingerprint Sensor Verification with Template Updating Technique Reviewed

SangWoo Sin, Ru Zhou, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E95A ( 1 )   346 - 353   2012.1

Optimized communication and synchronization for embedded multiprocessors using ASIP methodology Reviewed

Hao Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Yuko Nakase, Sadahiro Kimura

IPSJ Transactions on System LSI Design Methodology   5   118 - 132   2012

Hybrid Shared-memory and Message-passing Multiprocessor System-on-Chip for UWB MAC Reviewed

Hao Xiao, Tsuyoshi Isshiki, Hiroaki Kunieda, Yuko Nakase, Sadahiro Kimura

2012 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE)   658 - +   2012

A Reconfigurable High Performance ASIP Engine for Image Signal Processing Reviewed

Hsuanchun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

2012 IEEE 26TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS & PHD FORUM (IPDPSW)   368 - 375   2012

A Reconfigurable ASIP-based Approach for High Performance Image Signal Processing Reviewed

Mochamad Asri, Hsuan-Chun Liao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

2012 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS)   611 - 614   2012

Application-Specific Instruction-Set Processor Design Methodology for Wireless Image Transmission Systems Reviewed

Tsuyoshi Isshiki, Hao Xiao, Hsuan-Chun Liao, Dongju Li, Hiroaki Kunieda

2012 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC)   293 - 296   2012

Robust multiple minutiae partitions for fingerprint authentication Reviewed

Hao Ni, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

Proceedings - 2012 International Symposium on Biometrics and Security Technologies, ISBAST 2012   35 - 44   2012

Ultrafast fingerprint indexing for embedded systems Reviewed

Ru Zhou, Sang Woo Sin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

OPTICAL ENGINEERING   50 ( 10 )   2011.10

Practical Orientation Field Estimation for Embedded Fingerprint Recognition Systems Reviewed

Yukun Liu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS   E94D ( 9 )   1792 - 1799   2011.9

Unique Fingerprint-Image-Generation Algorithm for Line Sensors Reviewed

Hao Ni, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E94A ( 2 )   781 - 788   2011.2

Adaptive SIFT-based algorithm for specific fingerprint verification Reviewed

Ru Zhou, Sang Woo Sin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

2011 International Conference on Hand-Based Biometrics, ICHB 2011 - Proceedings   41 - 46   2011

A novel similarity measurement for minutiae-based fingerprint verification Reviewed

Yukun Liu, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEEE 4th International Conference on Biometrics: Theory, Applications and Systems, BTAS 2010   2010

Entropy Decoding Processor for Modern Multimedia Applications Reviewed

Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E92A ( 12 )   3248 - 3257   2009.12

Trace-Driven Workload Simulation Method for Multiprocessor System-On-Chips Reviewed

Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Toshio Isomura, Kazuo Satou

DAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2   232 - +   2009

Multiprocessor SoC Design Framework on Tightly-Coupled Thread Model Reviewed

Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

ISOCC: 2008 INTERNATIONAL SOC DESIGN CONFERENCE, VOLS 1-3   56 - 61   2008

H.264/AVC decoder SoC towards the low cost mobile video player Reviewed

Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

20TH ANNIVERSARY IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS   151 - 154   2007

Novel SoC architecture embedded bit serial FPGA Reviewed

YW Wang, DJ Li, T Isshiki, H Kunieda

PROCEEDINGS OF THE 2004 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1 AND 2   133 - 136   2004

High density bit-serial FPGA with LUT embedding shift register function. Reviewed

T Isshiki, A Ohta, T Watanabe, T Nakada, K Akahane, Sisla, I, D Li, H Kunieda

APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS   475 - 480   2002

Efficient method for face region quality enhancement in low bit rate video coding Reviewed

R Adiono, T Isshiki, D Li, H Kunieda

APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS   549 - 553   2002

Cost-effective shadowing method using the ED-buffer on an adaptive light cube Reviewed

T Isshiki, M Ishikawa, H Kunieda

VISUAL COMPUTER   16 ( 8 )   453 - 468   2000

Efficient anti-aliasing algorithm for computer generated images Reviewed

T Isshiki, H Kunieda

ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4   532 - 535   1999

Array architecture and design for image window operation processing ASICs

Dongju Li, Li Jiang, Tsuyoshi Isshiki, Hiroaki Kunieda

Proceedings - IEEE International Symposium on Circuits and Systems   2   474 - 477   1998

Bit-serial pipeline synthesis and layout for large-scale configurable systems Reviewed

T Isshiki, WWM Dai, H Kunieda

PROCEEDINGS OF THE ASP-DAC '97 - ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1997   441 - 446   1996

PARALLEL PROCESSING ARCHITECTURE DESIGN FOR 2-DIMENSIONAL IMAGE-PROCESSING USING SPATIAL EXPANSION OF THE SIGNAL FLOW GRAPH Reviewed

T ISSHIKI, Y TAKEUCHI, H KUNIEDA

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E76A ( 3 )   337 - 348   1993.3

SYSTEMATIC ARCHITECTURE DESIGN FOR HIGHLY PARALLEL IMAGE-PROCESSING ARRAY Reviewed

T ISSHIKI, Y TAKEUCHI, H KUNIEDA

PROCEEDINGS OF THE 35TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2   299 - 302   1992

A unified performance estimation method for hardware and software components in multiprocessor system-on-chips

Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda

IPSJ Transactions on System LSI Design Methodology   3   194 - 206   2010

Weed Detection over Between-Row of Sugarcane Fields Using Machine Vision with Shadow Robustness Technique for Variable Rate Herbicide Applicator

Apimuk Muangkasem, Somying Thainimit, Rachaporn Keinprasit, TSUYOSHI ISSHIKI, Rattana Tangwongkit

Energy Research Journal   1 ( 2 )   141 - 145   2010

A Unified Performance Estimation Method for Hardware and Software Components in Multiprocessor System-On-Chips

ARIF ULLAH KHAN, TSUYOSHI ISSHIKI, DONGJU LI, hiroaki kunieda

IPSJ Transactions on System LSI Design Methodology   3   194 - 206   2010

Weed Detection over Between-Row of Sugarcane Fields Using Machine Vision with Shadow Robustness Technique for Variable Rate Herbicide Applicator

Apimuk Muangkasem, Somying Thainimit, Rachaporn Keinprasit, TSUYOSHI ISSHIKI, Rattana Tangwongkit

Energy Research Journal   1 ( 2 )   141 - 145   2010

Bangkok Report

SUGINO Nobuhiko, ISSHIKI Tsuyoshi, NISHIHARA Akinori, KUNIEDA Hiroaki

IEICE Fundamentals Review   12 ( 4 )   102 - 105   2009

Decomposition of task-level concurrency on C programs applied to the design of multiprocessor SoC

Mohammad Zalfany Urfianto, Tsuyoshi Isshiki, Arif Ullah Khan, Dongju Li, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E91A ( 7 )   1748 - 1756   2008.7

A Multiprocessor SoC architecture with efficient communication infrastructure and advanced compiler support for easy application development

Mohammad Zalfany Urfianto, Tsuyoshi Isshiki, Arif Ullah Khan, Dongju Li, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E91A ( 4 )   1185 - 1196   2008.4

Low cost SoC design of H.264/AVC decoder for handheld video player

Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E91A ( 4 )   1197 - 1205   2008.4

Fast and Accurate Singular Point Detection and Classfication on Quantized Orientation Field of Fingerprints

Wei Tang, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE transaction on Information and System   accepted   2008

Minutia Shape Indexing for Embedded Fingerprint Identification

Wei Tang, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE transaction on Information and System   submitted   2008

Fast and Accurate Singular Point Detection and Classfication on Quantized Orientation Field of Fingerprints

Wei Tang, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE transaction on Information and System   accepted   2008

Minutia Shape Indexing for Embedded Fingerprint Identification

Wei Tang, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE transaction on Information and System   submitted   2008

Embedded Systems Implementation Technology

Tsuyoshi Isshiki

Kyokai Joho Imeji Zasshi/Journal of the Institute of Image Information and Television Engineers   61 ( 7 )   901 - 904   2007.9

A fingerprint matching using minutia ridge shape for low cost match-on-card systems

AS Rikin, DJ Li, T Isshiki, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E88A ( 5 )   1305 - 1312   2005.5

A Novel Fingerprint SoC with Bit Serial FPGA Engine

Wang Yiwen, Li Dongju, Isshiki Tsuyoshi, Kunieda Hiroaki

ipsjdc   Vol.46   1366 - 1373   2005

A Novel Fingerprint SoC with Bit Serial FPGA Engine

Y. Wang, D. Li, T, Isshiki H. Kunieda

Vol.46   1366 - 1373   2005

A fingerprint matching using minutia ridge shape for low cost Match-on-Card systems

Andy Surya Rikin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences   E88-A ( 5 )   1305 - 1312   2005

Fast fingerprint classification based on direction pattern

JQ Qi, DJ Li, T Isshiki, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E87A ( 8 )   1887 - 1892   2004.8

Binary line-pattern algorithm for embedded fingerprint authentication system

JQ Qi, DJ Li, T Isshiki, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E87A ( 8 )   1879 - 1886   2004.8

Binary Line-Pattern Algorithm for Embedded Fingerprint Authentication System

J. Qi, D. Li, T, Isshiki H. Kunieda

IEICE Trans. Fundamentals   vol.E87-A   1879 - 1886   2004

Fast Fingerprint Classification based on Direction Pattern

J. Qi, D. Li, T, Isshiki H. Kunieda

IEICE Trans. Fundamentals   vol.E87-A   1887 - 1892   2004

New rate control method with minimum skipped frames for very low delay in H.263+codec

T Adiono, T Isshiki, C Honsawek, K Ito, DJ Li, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E85A ( 6 )   1396 - 1407   2002.6

System-MSPA design of H.263+video encoder/decoder LSI for videotelephony applications

C Honsawek, K Ito, T Ohtsuka, T Adiono, DJ Li, T Isshiki, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E84A ( 11 )   2614 - 2622   2001.11

Cost-effective shadowing method using the ED-buffer on an adaptive light cube

Tsuyoshi Isshiki, Makoto Ishikawa, Hiroaki Kunieda

Visual Computer   16 ( 8 )   453 - 468   2000.11

Cost-effective shadowing method using the ED-buffer on an adaptive light cube

Tsuyoshi Isshiki, Makoto Ishikawa, Hiroaki Kunieda

Visual Computer   16 ( 8 )   453 - 468   2000.11

A new FPGA architecture for high performance bit-serial pipeline datapath

A Ohta, T Isshiki, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E83A ( 8 )   1663 - 1672   2000.8

A new FPGA architecture for high performance bit-serial pipeline datapath

A Ohta, T Isshiki, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E83A ( 8 )   1663 - 1672   2000.8

New VLSI array processor design for image window operations

DJ Li, L Jiang, T Isshiki, H Kunieda

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING   46 ( 5 )   635 - 640   1999.5

New VLSI array processor design for image window operations

DJ Li, L Jiang, T Isshiki, H Kunieda

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING   46 ( 5 )   635 - 640   1999.5

Scalable VLSI architectures for lattice structure-based discrete wavelet transform

JT Kim, YH Lee, T Isshiki, H Kunieda

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING   45 ( 8 )   1031 - 1043   1998.8

Scalable VLSI architectures for lattice structure-based discrete wavelet transform

JT Kim, YH Lee, T Isshiki, H Kunieda

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING   45 ( 8 )   1031 - 1043   1998.8

Routability analysis of bit-serial pipeline datapaths

T Isshiki, WWM Dai, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E80A ( 10 )   1861 - 1870   1997.10

Instruction sequence based synthesis for application specific micro-architecture

KS Jang, T Isshiki, H Kunieda

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E80A ( 6 )   1021 - 1032   1997.6

Routability Analysis of Bit-Serial Pipe Line Datapaths

T. Isshiki W, W.-M, Dai, H. Kunieda

IEICE Trans.   E80-A   1861 - 1870   1997

A SILICON-ON-SILICON FIELD-PROGRAMMABLE MULTICHIP-MODULE (FPMCM) - INTEGRATING FPGA AND MCM TECHNOLOGIES

J DARNAUER, T ISSHIKI, P GARAY, J RAMIREZ, MAHESHWARI, V, WWM DAI

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY PART B-ADVANCED PACKAGING   18 ( 4 )   601 - 608   1995.11

A SILICON-ON-SILICON FIELD-PROGRAMMABLE MULTICHIP-MODULE (FPMCM) - INTEGRATING FPGA AND MCM TECHNOLOGIES

J DARNAUER, T ISSHIKI, P GARAY, J RAMIREZ, MAHESHWARI, V, WWM DAI

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY PART B-ADVANCED PACKAGING   18 ( 4 )   601 - 608   1995.11

Parallel Processing Architecture Design for Two-Dimensional Image Processing Using Spatial Expansion of the Signal Flow Description

T. Isshiki, Y. Takeuchi, H. Kunieda

IEICE Trans. Fundamentals   E76-A   337 - 348   1993

Parallel Processing Architecture Design for Two-Dimensional Image Processing Using Spatial Expansion of the Signal Flow Description

T. Isshiki, Y. Takeuchi, H. Kunieda

IEICE Trans. Fundamentals   E76-A   337 - 348   1993

2-DIMENSIONAL QUADRILATERAL RECURSIVE DIGITAL-FILTERS WITH PARALLEL STRUCTURE - SYNTHESIS AND PARALLEL PROCESSING

T ISSHIKI, H KUNIEDA, M KANEKO

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E75A ( 3 )   352 - 361   1992.3

2-DIMENSIONAL QUADRILATERAL RECURSIVE DIGITAL-FILTERS WITH PARALLEL STRUCTURE - SYNTHESIS AND PARALLEL PROCESSING

T ISSHIKI, H KUNIEDA, M KANEKO

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES   E75A ( 3 )   352 - 361   1992.3

MAPS-TCT: MPSoC Application Parallelization and Architecture Exploration Framework

2008 

MAPS: An Integrated Framework for MPSoC Application Parallelization

Proceedings of 45th Design Automation Conference (2008)  2008 

Tightly-Coupled-Thread Model: A New Design Framework for Multiprocessor System-on-Chips

ＤＡシンポジウム  2006 

Embedded Software Development Flow and Verification for a Heterogeneous MPSoC Based on Tightly Coupled Thread Model

Embedded Systems Symposium 2007  2007 

Data-driven Multiprocessor SoC Architecture Design Based on Tightly-Coupled-Thread Model

ＤＡシンポジウム  2006 

Fast Search for Fingerprint Matching in Embedded System

International Conference on Information and Communication Technology for Embedded Systems  2010 

Implementation of Low Cost Data Logger Using Flash Disk with File Allocation Table

International Conference on Information and Communication Technology for Embedded Systems  2010 

Fingerprint Reference Point Extraction in Small Size Sensor Images

International Conference on Information and Communication Technology for Embedded Systems  2010 

A Novel Fingerprint Orientation Field Estimation Method

International Conference on Information and Communication Technology for Embedded Systems  2010 

“Prototype of a Real-Time Precision Herbicide Applicator over between-row of Sugarcane Field

International Conference on Information and Communication Technology for Embedded Systems  2010 

High-Speed Video Processing System-On-Chip Architecture Exploration

International Conference on Information and Communication Technology for Embedded Systems  2010 

Cool MPSoC Programming

Design, Automation & Test in Europe  2010 

Architecture of Dynamic Reconfigurable Neural Networks Based ib Network-on-Chip

International Conference on Information and Communication Technology for Embedded Systems  2010 

MAPS: An Integrated Framework for MPSoC Application Parallelization

Proceedings of 45th Design Automation Conference (2008)  2008 

MPSoC Platform for Super Hi-vision Video Processing System

2010 

Efficient Method for FaceRegion Quality Enhancement in Low Bit Rate Video Coding

IEEE Asia Pasific Conference on Circuit and System  2002 

Realization of Fingerprint Identification Module on DSP Board

IEEE Asia Pasific Conference on Circuit and System  2002 

High Density Bit-Serial FPGA with LUT Embedding Shift Register Function

IEEE Asia Pasific Conference on Circuit and System  2002 

A New Methodology for Low Delay Real-time Videophone Software Architecture Design

IEEE Asia Pasific Conference on Circuit and System  2002 

A Novel Fingerprint Orientation Field Estimation Method

International Conference on Information and Communication Technology for Embedded Systems  2010 

Fast Search for Fingerprint Matching in Embedded System

International Conference on Information and Communication Technology for Embedded Systems  2010 

Architecture of Dynamic Reconfigurable Neural Networks Based ib Network-on-Chip

International Conference on Information and Communication Technology for Embedded Systems  2010 

Fingerprint Reference Point Extraction in Small Size Sensor Images

International Conference on Information and Communication Technology for Embedded Systems  2010 

Implementation of Low Cost Data Logger Using Flash Disk with File Allocation Table

International Conference on Information and Communication Technology for Embedded Systems  2010 

Efficient Method for FaceRegion Quality Enhancement in Low Bit Rate Video Coding

IEEE Asia Pasific Conference on Circuit and System  2002 

Multiprocessor System-On-Chip Design Methodology Using Model-Based Tightly-Compled Thread Model

International Conference on Information and Communication Technology for Embedded Systems  2010 

Realization of Fingerprint Identification Module on DSP Board

IEEE Asia Pasific Conference on Circuit and System  2002 

High Density Bit-Serial FPGA with LUT Embedding Shift Register Function

IEEE Asia Pasific Conference on Circuit and System  2002 

A New Methodology for Low Delay Real-time Videophone Software Architecture Design

IEEE Asia Pasific Conference on Circuit and System  2002 

MPSoC Platform for Super Hi-vision Video Processing System

2010 

Cool MPSoC Programming

Design, Automation & Test in Europe  2010 

Performance Improvement of Eddy-current Dynamometers with FEL Controller

International Conference on Information and Communication Technology for Embedded Systems  2010 

Template-Statistical based Fingerprint Classification

International Symposium on Intelligent Signal Processing and Communication Systems ISPACS  2003 

Unique Fingerprint Image Generation Algorithm for One Line Swipe Sensors

International Conference on Information and Communication Technology for Embedded Systems  2010 

Small Memory Minutia Matching Method

International Symposium on Intelligent Signal Processing and Communication Systems ISPACS  2003 

Fingerprint Authentication Programmable SoC Featuring Run-time Reconfigurable Interfaces

International Symposium on Intelligent Signal Processing and Communication Systems ISPACS  2003 

Fingerprint Authentication Programmable SoC Featuring Run-time Reconfigurable Interfaces

International Symposium on Intelligent Signal Processing and Communication Systems ISPACS  2003 

A novel SOC architecture embedded bit serial FPGA

IEEE Asia-Pacific Conference on Circuits and Systems  2004 

Template-Statistical based Fingerprint Classification

International Symposium on Intelligent Signal Processing and Communication Systems ISPACS  2003 

Small Memory Minutia Matching Method

International Symposium on Intelligent Signal Processing and Communication Systems ISPACS  2003 

“Prototype of a Real-Time Precision Herbicide Applicator over between-row of Sugarcane Field

International Conference on Information and Communication Technology for Embedded Systems  2010 

Data-driven Multiprocessor SoC Architecture Design Based on Tightly-Coupled-Thread Model

ＤＡシンポジウム  2006 

High-Speed Video Processing System-On-Chip Architecture Exploration

International Conference on Information and Communication Technology for Embedded Systems  2010 

Tightly-Coupled-Thread Model: A New Design Framework for Multiprocessor System-on-Chips

ＤＡシンポジウム  2006 

A novel SOC architecture embedded bit serial FPGA

IEEE Asia-Pacific Conference on Circuits and Systems  2004 

A Multiprocessor System-on-chip Architecture with Enhanced Compiler Support and Efficient Interconnect

IP-SOC 2006  2006 

Unique Fingerprint Image Generation Algorithm for One Line Swipe Sensors

International Conference on Information and Communication Technology for Embedded Systems  2010 

Multiprocessor System-On-Chip Design Methodology Using Model-Based Tightly-Compled Thread Model

International Conference on Information and Communication Technology for Embedded Systems  2010 

A Multiprocessor System-on-chip Architecture with Enhanced Compiler Support and Efficient Interconnect

IP-SOC 2006  2006 

Performance Improvement of Eddy-current Dynamometers with FEL Controller

International Conference on Information and Communication Technology for Embedded Systems  2010