Organization
School of Engineering Assistant Professor
Title
Assistant Professor
External link
TAYU SATOSHI
Degree
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Doctor of Engineering ( Tokyo Institute of Technology )
Research Interests
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Combinatorial Optimization
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Parallel Computation
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組合せ最適化
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並列計算
Research Areas
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Informatics / Theory of informatics
Education
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Tokyo Institute of Technology Science of Engineering
- 1997
Country： Japan
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Tokyo Institute of Technology Graduate School, Division of Science and Engineering
- 1997
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Tokyo Institute of Technology School of Engineering
- 1992
Country： Japan
Research History
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-:Tokyo Institute of Technology Graduate School of Science and Engineering Research Associate
2003
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-:東京工業大学 大学院理工学研究科
2003
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:北陸先端科学技術大学院大学 情報科学研究科 助手
1997 - 2003
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:Japan Advanced Institute of Science and Technology School of Information Science Research Associate
1997 - 2003
Professional Memberships
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Information and Communication Engineers
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The Institute of Electronics
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IPSJ
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情報処理学会
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電子情報通信学会
Committee Memberships
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情報処理学会 アルゴリズム研究会運営委員
2004
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電子情報通信学会 電子情報通信学会 査読委員
2001
MISC
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On the two-dimensional orthogonal drawing of series-parallel graphs
Satoshi Tayu, Kumiko Nomura, Shuichi Ueno
Discrete Applied Mathematics 157 ( 8 ) 1885 - 1895 2009.4
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On the two-dimensional orthogonal drawing of series-parallel graphs
Satoshi Tayu, Kumiko Nomura, Shuichi Ueno
DISCRETE APPLIED MATHEMATICS 157 ( 8 ) 1885 - 1895 2009.4
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On Fault Testing for Reversible Circuits
Satoshi Tayu, Shigeru Ito, Shuichi Ueno
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS E91D ( 12 ) 2770 - 2775 2008.12
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Cost-Constrained Minimum-Delay Multicasting
Satoshi Tayu, Truki Al-Mutairi, Shuichi UENO
Journal of Interconnection Networks 9 ( 1&2 ) 141 - 155 2008
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On Fault Testing for Reversible Circuits
田湯 智, 伊東 滋, 上野修一
電子情報通信学会英語論文誌D E91-D ( 12 ) 2770 - 2775 2008
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Cost-Constrained Minimum-Delay Multicasting
Satoshi Tayu, Truki Al-Mutairi, Shuichi UENO
Journal of Interconnection Networks 9 ( 1&2 ) 141 - 155 2008
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On the orthogonal drawing of outerplanar graphs
K Nomura, S Tayut, S Ueno
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 6 ) 1583 - 1588 2005.6
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On the Orthogonal Drawing of Outerplanar Graphs
Kumiko Nomura, Satoshi Tayu, Shuichi Ueno
IEICE Trans. Fundamentals E88-A ( 6 ) 1583 - 1588 2005
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Charactorization and Computation of Steiner Wiring Based on Elmore's Delay Model
Satoshi TAYU, Mineo KANEKO
IEICE Trans. Fundamentals E85-A ( 12 ) 2764 - 2774 2002
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Scheduling Trees onto Hypercubes and Grids
Satoshi Tayu
IEICE Trans. Fundamentals E85-A ( 5 ) 1011 - 1019 2002
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Charactorization and Computation of Steiner Wiring Based on Elmore's Delay Model
Satoshi TAYU, Mineo KANEKO
IEICE Trans. Fundamentals E85-A ( 12 ) 2764 - 2774 2002
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Scheduling Trees onto Hypercubes and Grids
Satoshi Tayu
IEICE Trans. Fundamentals E85-A ( 5 ) 1011 - 1019 2002
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Embedding Binary Trees into Hypercubes
IEICE Trans. Fundamentals E81-A ( 4 ) 682 - 695 1998
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２分木のハイパーキューブへの埋め込み
田湯智, 上野修一
電子情報通信学会和文論文誌Ａ E81-A ( 4 ) 682 - 695 1998
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Efficient Embedding of Binary Trees with Bounded Pathwidth into Paths and Grid
Satoshi TAYU, Shuichi UENO
IEICE Trans. Fundamentals E80-A ( 1 ) 1997
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Efficient Embedding of Binary Trees with Bounded Pathwidth into Paths and Grid
Satoshi TAYU, Shuichi UENO
IEICE Trans. Fundamentals E80-A ( 1 ) 1997
Presentations
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Lower Bounds for the Height of Three-Dimensional Channel Routing
2008 IEICE General Conference 2008
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On Orthogonal Ray Graphs
The First AAAC(Asian Association for Algorithms and Computation) Annual Meeting 2008
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On the Three-Dimensional Orthogoanl Drawing of Seiries-Parallel Graphs
IEEE International Symposium on Circuits and Systems 2008
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An Efficient Quantum Addition Circuit
2008
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The Complexity of Three-Dimensional Channel Routing
The 5th Hungarian-Japanese Symposium on Discrete Mathematicas and Its Applications 2007
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On Orthogonal Ray Graphs
Technical Report of the IPSJ 2008
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On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs
Technical Report of the IPSJ 2008
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Orthogonal Ray Graphs and Nano-PLA Design
Technical Report of the IEICE 2008
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On the Three-Dimensional Single-Active-Layer Routing
Technical Report of the IEICE 2008
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On the Permutation Routing in All-Optical Caterpillar Networks
Technical Committee on Circuits and Systems, IEICE 2007
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On the Fault Testing for Reversible Circuits
International Computing and Combinatorics Conference 2007
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The Complexity of Three-Dimensional Channel Routing
The 5th Hungarian-Japanese Symposium on Discrete Mathematicas and Its Applications 2007
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On the Complexity of Three-Dimensional Channel Routing
IEEE International Symposium on Circuits and Systems 2007
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On the Complexity of Three-Dimensional Channel Routing
IEEE International Symposium on Circuits and Systems 2007
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On the Fault Testing for Reversible Circuits
情報処理学会アルゴリズム研究会 2007
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On Orthogonal Ray Graphs with Applications to NanoPLA Design
2008
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An Efficient Quantum Addition Circuit
2008
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On Orthogonal Ray Graphs with Applications to NanoPLA Design
2008
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Lower Bounds for the Height of Three-Dimensional Channel Routing
2008 IEICE General Conference 2008
-
On Orthogonal Ray Graphs
The First AAAC(Asian Association for Algorithms and Computation) Annual Meeting 2008
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On Two-Directional Orthogonal Ray Graphs
Japan Conference on Comutational Geometry and Graphs 2009
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On Two-Directional Orthogonal Ray Graphs
IPSJ SIGAL 2009
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Universal Test Sets for Reversible Circuits
2009
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On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs
2008
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On the Three-Dimensional Orthogoanl Drawing of Outerplanar Graphs (Extended Abstract)
IEEE International Symposium on Circuits and Systems 2009
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Orthogonal Ray Graphs and Nano-PLA Design
IEEE International Symposium on Circuits and Systems 2009
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Universal Test Sets for Reversible Circuits
2009 IEICE Society Conference 2009
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Characterizations of Two-Directional Orthogonal Ray Graphs
2009 IEICE Society Conference 2009
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Universal Reversible Circuits
2009 IEICE General Conference 2009
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Fault Testing for Linear Reversible Circuits
2009 IEICE General Conference 2009
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Universal Test Sets for Reversible Circuits
International Computing and Combinatorics Conference 2010
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A Note on Two Problems of Nano-PLA Design
Technical Committee on Circuits and Systems, IEICE 2009
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On the Three-Dimensional Single-Active-Layer Routing with Dual Channels
2010 IEICE General Conference 2010
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A Necessary Condition for Orthogonal Ray Graphs
2010 IEICE General Conference 2010
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A Note on a Problem of Nano-PLA Design
2010 IEICE General Conference 2010
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On Two-Directional Orthogonal Ray Graphs
IEEE International Symposium on Circuits and Systems 2010
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On Two-Directional Orthogonal Ray Graphs
IEEE International Symposium on Circuits and Systems 2010
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Universal Test Sets for Reversible Circuits
International Computing and Combinatorics Conference 2010
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A Note on Fault Testing for Reversible Circuits
2010 IEICE General Conference 2010
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On the Three-Dimensional Orthogonal Face Routing
2010 IEICE General Conference 2010
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A Note on Two Problems of Nano-PLA Design
Technical Committee on Circuits and Systems, IEICE 2009
-
Characterizations of Two-Directional Orthogonal Ray Graphs
2009 IEICE Society Conference 2009
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On Two-Directional Orthogonal Ray Graphs
Japan Conference on Comutational Geometry and Graphs 2009
-
On Two-Directional Orthogonal Ray Graphs
IPSJ SIGAL 2009
-
Universal Test Sets for Reversible Circuits
2009
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Fault Testing for Linear Reversible Circuits
2009 IEICE General Conference 2009
-
On the Three-Dimensional Orthogoanl Drawing of Outerplanar Graphs (Extended Abstract)
IEEE International Symposium on Circuits and Systems 2009
-
Orthogonal Ray Graphs and Nano-PLA Design
IEEE International Symposium on Circuits and Systems 2009
-
Universal Test Sets for Reversible Circuits
2009 IEICE Society Conference 2009
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Universal Reversible Circuits
2009 IEICE General Conference 2009
-
On the Two-Dimensional Orthogonal Drawing of Series-Parallel Graphs
2004 IEICE Society Conference 2004
-
On the Orthogonal Drawing of Series-Parallel Graphs
情報処理学会 アルゴリズム研究会 2004
-
On the Three-Dimensional Channel Routing
情報処理学会 アルゴリズム研究会 2004
-
On the Three-Dimensional Single-Active-Layer Routing with Dual Channels
2010 IEICE General Conference 2010
-
A Necessary Condition for Orthogonal Ray Graphs
2010 IEICE General Conference 2010
-
A Note on a Problem of Nano-PLA Design
2010 IEICE General Conference 2010
-
A Note on Fault Testing for Reversible Circuits
2010 IEICE General Conference 2010
-
On the Three-Dimensional Orthogonal Face Routing
2010 IEICE General Conference 2010
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On the Three-Dimensional Channel Routing
IEEE International Symposium on Circuits and Systems 2005
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On the Complexity of Fault Testing for Reversible Circuits
2005 IEICE Society Conference 2005
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A Note on the Three-Dimensional Channel Routing
the 2005 IEICE General Conference 2005
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On the Three-Dimensional Channel Routing
IEEE International Symposium on Circuits and Systems 2005
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On the Complexity of Fault Testing for Reversible Circuits
2005 IEICE Society Conference 2005
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On the Three-Dimensional Layout of Butterfly Networks
2005 IEICE Society Conference 2005
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On the Complexity of Fault Testing for Reversible Circuits
電子情報通信学会 回路とシステム研究会 2005
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On the Two-Dimensional Orthogonal Drawing of Series-Parallel Graphs
電子情報通信学会 回路とシステム研究会 2005
-
Cost-Constrained Minimum-Delay Multicasting
International Conference on Current Trends in Theory and Practice of Informatics 2005
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A Note on Sparse Networks Tolerating Random Faults for Cycles
the 2005 IEICE General Conference 2005
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On the Three-Dimensional Layout of Butterfly Networks
2005 IEICE Society Conference 2005
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On the Complexity of Fault Testing for Reversible Circuits
電子情報通信学会 回路とシステム研究会 2005
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On the Three-Dimensional Channel Routing
情報処理学会 アルゴリズム研究会 2004
-
Cost-Constrained Minimum-Delay Multicasting
電子情報通信学会VLD, DSP, CAS 合同研究会 2004
-
On the Orthogonal Drawing of Outerplanar Graphs
International Computing and Combinatorics Conference 2004
-
On the Three-Dimensional Channel Routing
2004 IEICE Society Conference 2004
-
On the Orthogonal Drawing of Outerplanar Graphs
International Computing and Combinatorics Conference 2004
-
On the Three-Dimensional Channel Routing
2004 IEICE Society Conference 2004
-
On the Two-Dimensional Orthogonal Drawing of Series-Parallel Graphs
2004 IEICE Society Conference 2004
-
On the Orthogonal Drawing of Series-Parallel Graphs
情報処理学会 アルゴリズム研究会 2004
-
On the Two-Dimensional Orthogonal Drawing of Series-Parallel Graphs
電子情報通信学会 回路とシステム研究会 2005
-
Cost-Constrained Minimum-Delay Multicasting
電子情報通信学会VLD, DSP, CAS 合同研究会 2004
-
On the Fault Testing for Reversible Circuits
情報処理学会アルゴリズム研究会 2007
-
On the Permutation Routing in All-Optical Caterpillar Networks
Technical Committee on Circuits and Systems, IEICE 2007
-
On the Fault Testing for Reversible Circuits
International Computing and Combinatorics Conference 2007
-
On the Three-Dimensional Orthogonal Drawing of Series-Parallel Graphs
電子情報通信学会 回路とシステム研究会 2006
-
On the Three-Dimensional Layout of Hypercubes
2006 IEICE Society Conference 2006
-
Three-Dimensional Channel Routeing is in NP
2006 IEICE Society Conference 2006
-
The Complexity of Fault Testing for Reversible Circuits
2006 IEICE Society Conference 2006
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The Complexity of Three-Dimensional Channel Routeing
回路とシステム研究会 2006
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On the Complexity of Three-Dimensional Channel Routing
情報処理学会弟68回全国大会 2006
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On the Two-Dimensional Orthogonal Drawing of Series-Parallel Graphs
IEEE International Symposium on Circuits and Systems 2006
-
On the Complexity of Fault Testing for Reversible Circuits
Technical Report of IPSJ 2006
-
On the Three-Dimensional Orthogonal Drawing of Series-Parallel Graphs
電子情報通信学会 回路とシステム研究会 2006
-
On the Complexity of Three-Dimensional Channel Routing
情報処理学会弟68回全国大会 2006
-
On the Two-Dimensional Orthogonal Drawing of Series-Parallel Graphs
IEEE International Symposium on Circuits and Systems 2006
-
The Complexity of Three-Dimensional Channel Routeing
回路とシステム研究会 2006
-
Cost-Constrained Minimum-Delay Multicasting
International Conference on Current Trends in Theory and Practice of Informatics 2005
-
A Note on Sparse Networks Tolerating Random Faults for Cycles
the 2005 IEICE General Conference 2005
-
A Note on the Three-Dimensional Channel Routing
the 2005 IEICE General Conference 2005
-
On the Complexity of Fault Testing for Reversible Circuits
Technical Report of IPSJ 2006
-
On the Three-Dimensional Layout of Hypercubes
2006 IEICE Society Conference 2006
-
Three-Dimensional Channel Routeing is in NP
2006 IEICE Society Conference 2006
-
The Complexity of Fault Testing for Reversible Circuits
2006 IEICE Society Conference 2006
-
On the Three-Dimensional Single-Active-Layer Routing
Technical Report of the IEICE 2008
-
On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs
2008
-
On the Three-Dimensional Orthogoanl Drawing of Seiries-Parallel Graphs
IEEE International Symposium on Circuits and Systems 2008
-
On Orthogonal Ray Graphs
Technical Report of the IPSJ 2008
-
On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs
Technical Report of the IPSJ 2008
-
Orthogonal Ray Graphs and Nano-PLA Design
Technical Report of the IEICE 2008
Research Projects
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Efficient Solution space searchnig
Grant type：Competitive
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グラフ描画
Grant type：Competitive
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効率的解空間探索
Grant type：Competitive
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Graph Drawing
Grant type：Competitive