Organization
School of Engineering Professor
Title
Professor
External link
OKADA KENICHI
News & Topics
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2023/06/26
Languages： English
" NTT Corporation (Headquarters: Chiyoda-ku, Tokyo; President & CEO: Akira Shimada; "NTT") and Professor Kenichi Okada and researchers of the Department of Electrical and Electronic Engineering, Sc"
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軽くて柔らかな基板を用いた宇宙で大きく展開可能なフェーズドアレイ無線機を実現 軽量・小型化で衛星打ち上げコストを大幅に削減
2023/06/19
Languages： Japanese
要点-フレキシブル液晶ポリマー基板を用いて折り曲げ可能な無線機を作成。-重量が従来のリジッド基板の無線機の4分の1以下となる軽量化を実現。-衛星コンステレーションの打ち上げコストを大幅に削減可能。概要東京工業大学科学技術創成研究院未来産業技
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Towards the New-Space Era with Foldable Phased-Array Transmitters for Small Satellites
2023/06/14
Languages： English
New design for a foldable phased-array transmitter can help make satellites lightweight, smaller, and cost-efficient to launch, report scientists at Tokyo Tech. The transmitter is made of stacked
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300GHz帯でのビームフォーミングと高速データ伝送に成功 端末への超大容量データ瞬時転送の実現に向けた要素技術の確立
2023/06/13
Languages： Japanese
概要東京工業大学工学院電気電子系の岡田健一教授らと日本電信電話株式会社（以下「NTT」）は、2030年代の6Gに向けて300GHz帯のフェーズドアレイ送信モジュールを開発し、ビームフォーミングを用いた300GHz帯高速無線データ伝送に世界で初めて成功しました。本技術により、移動する
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Preparing the Stage for 6G: A Fast and Compact Transceiver for Sub-THz Frequencies
2023/06/09
Languages： English
New transceiver design capable of both transmission and reception at frequencies over 100 GHz and at 112 Gb/s data rate could pave the way to 6G technologies, as reported by scientists at Tokyo T
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6G向け100 Gbps超の超高速サブテラヘルツフェーズドアレイ無線機を開発 6G高速大容量無線通信システムの実用化へ大きな一歩
2023/06/09
Languages： Japanese
要点-送信しながら受信もできる全二重サブテラヘルツフェーズドアレイ無線機を世界で初めて実現。-新提案のアンテナ構成で高周波信号の自己干渉を大幅に低減。-IoT／モバイル端末に搭載可能、100Gbps超の超高速・大容量6G通信をコンシューマー化へ。概
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Novel Architecture Can Reduce Noise-Induced Jitters in Digital Technology
2023/02/21
Languages： English
Jitters are a common shortcoming of modern electronic devices using a high-frequency digital signal. While oversampling phase-locked loops (OSPPLs) can expand the loop bandwidth, effectively redu
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New Transmitter Design for Small Satellite Constellations Improves Signal Transmission
2023/02/21
Languages： English
A novel transmitter design proposed in a recent study could solve some of the challenges related to signal transmission in small satellite constellations used for space applications. Developed by
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新アーキテクチャのデジタル位相同期回路を開発 ジッタ特性を大幅に改善、IoT向け低消費電力Beyond 5Gデバイスの普及を加速
2023/02/20
Languages： Japanese
要点-新しい非均一オーバーサンプリング手法を用いたデジタル位相同期回路を開発。-雑音の大きいサンプリング領域を排除し、位相同期回路のジッタを大幅に低減。-デジタル機器の小型化・低消費電力化を実現し、IoT向けLow-PowerBeyond5Gデバイスの
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小型地球観測衛星搭載用のKa帯フェーズドアレイ無線機の低消費電力化に成功 高頻度・高リアルタイムでの地球観測データサービスを実現
2023/02/20
Languages： Japanese
要点-従来の半分以下に低消費電力化したフェーズドアレイ無線機を開発。-フェーズドアレイICを安価で量産可能なCMOSプロセスで実現。-地球観測データサービスの高頻度・高リアルタイム性に寄与。概要東京工業大学科学技術創成研究院未来産業技術研究
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Beyond 5Gの端末機に向けたマルチバンドフェーズドアレイ受信ICを開発
2023/01/12
Languages： Japanese
要点 5G端末用マルチバンドフェーズドアレイ受信ICを開発 新しい高調波選択技術を提案、1チップで5Gミリ波帯全バンドのフェーズドアレイ通信を実現 全世界の5Gミリ波帯域に対応した低コスト・小型グローバル端末機の実現が可能となり、5G広帯域通信の普及を加速 概要東京工業大学 工学院 電気電子系の岡田健一教授らは、次世代のBeyond 5G[用語1]に向けて開発の進むミリ波[用語2]帯の全
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New and Improved Multi-Band Operational Receiver for 5G New Radio Communication
2022/12/26
Languages： English
An ultra-wide-band receiver based on a harmonic selection technique to improve the operational bandwidth of 5G networks has been developed by Tokyo Tech researchers in a new study. Fifth generation
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Efficient Satellite Downlink with a Ka Band Dual Circular Polarization Transmitter
2022/06/28
Languages： English
A new low-loss transmitter allows higher precision low-orbit satellite earth monitoring, according to a study by Tokyo Tech researchers. The novel tr
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超小型衛星搭載用Ka帯無線機の開発に成功 6G時代の衛星コンステレーションによる超広域、高速通信に貢献
2022/06/23
Languages： Japanese
要点-CMOSフェーズドアレイICによる両円偏波同時Ka帯通信に世界で初めて成功-ビーム角に適応する円偏波補償回路およびインピーダンスチューナを提案-超小型衛星搭載用Ka帯フェーズドアレイ無線機を開発概要東京工業大学科学技術創成研究院未来産業技術研究所の白根篤史准教授と同工学院電気電子系の岡田健一教
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Electricity and Data Over-the-Air: The Simultaneous Transmission of 5G and Power
2022/06/15
Languages： English
The potential of Millimeter-wave Wireless Power Transfer as a solution for Massive Internet of Things has finally been harnessed by researchers from
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Introducing a Transceiver that Can Tap into the Higher Frequency Bands of 5G Networks
2022/06/15
Languages： English
A novel phased-array beamformer for the 5G millimeter wave (mmWave) band has been recently developed by researchers at Tokyo Tech and NEC Corporation
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無線電力伝送と無線通信双方に同時対応するミリ波帯フェーズドアレイ無線機の開発に成功 電源線に制約されない中継器や基地局の設置を可能に
2022/06/14
Languages： Japanese
要点-ミリ波帯の無線電力伝送および無線通信対応CMOS集積回路を開発-電力および通信信号のビームステアリングによる受信を世界で初めて実現-中継機や基地局の設置自由度を向上、通信エリア拡大に貢献概要東京工業大学科学技術創成研究院未来産業技術研究所の白根篤史准教授と同工学院電気電子系の岡田健一教授は、無
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5GおよびBeyond 5Gの基地局に向けた高効率ミリ波帯フェーズドアレイ無線機を開発 独自の高効率増幅回路と、ばらつき補正技術によりミリ波帯無線機の低消費電力化を実現
2022/06/13
Languages： Japanese
要点-広帯域39GHz帯のミリ波帯フェーズドアレイ無線機を開発-双方向性ドハティ型増幅回路と、素子間ばらつき補正技術により、高効率と高信号品質を両立するミリ波帯高集積半導体ICを実現-現行の5Gに加え次世代のBeyond5Gの基地局への搭載を通じて、広帯域通信の実現と普及を加速概要東京工業大学工学院
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超高速ビームフォーミングが可能なミリ波帯フェーズドアレイ無線機を開発 Beyond 5Gに向けてミリ波のさらなる有効活用へ大きな一歩
2021/06/18
Languages： Japanese
要点-Beyond5Gに向けてミリ波帯フェーズドアレイ無線機を開発-移相器にデジタル補正技術を組み合わせ超高速・高精度のビームフォーミングを実現-各種無線通信機器に搭載でき、複数端末や高速移動への対応、時分割でのMIMO実現による高速通信が可能概要東京工業大学工学院電気電子系の岡田健一教授と日本電気
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Novel Fast-Beam-Switching Transceiver Takes 5G to the Next Level
2021/06/18
Languages： English
Scientists at Tokyo Institute of Technology (Tokyo Tech) and NEC Corporation jointly develop a 28-GHz phased-array transceiver that supports efficien
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電源不要のミリ波帯5G無線機の開発に成功 超低消費電力ビームフォーミングで5Gのエリア拡大に貢献
2021/06/16
Languages： Japanese
要点-無線電力伝送を利用したミリ波帯5G無線機を実現-5G準拠の超低消費電力ビームフォーミングに成功-24GHz帯無線電力伝送及び28GHz帯無線通信対応CMOS集積回路を開発概要東京工業大学工学院電気電子系の白根篤史助教、岡田健一教授は、電源不要で動作可能なミリ波帯[用語1]5G[用語2]中継無線
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Lean and mean: Maximizing 5G communications with an energy-efficient relay network
2021/06/16
Languages： English
Scientists at Tokyo Institute of Technology (Tokyo Tech) have developed a wirelessly powered relay network for 5G systems. The proposed battery-free
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テラヘルツ帯でのフェーズドアレイ無線機を実現 次世代無線通信システムの実用化へ大きな一歩
2021/02/05
Languages： Japanese
要点-200GHz以上の周波数帯で動作するCMOSフェーズドアレイ[用語1]無線機を世界で初めて実現、通信に成功-新たに考案した双方向無線機によりアンテナ共有および高集積化を達成-スマートフォン等のモバイル機器に搭載可能概要東京工業大学工学院電気電子系の岡田健一教授らと日本電信電話株式会社の研究グル
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Pushed to the Limit: A CMOS-based transceiver for beyond 5G applications at 300 GHz
2021/02/05
Languages： English
Scientists at Tokyo Institute of Technology and NTT Corporation develop a novel CMOS-based transceiver for wireless communications at the 300 GHz band
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Greater Connectedness in Remote Areas: A Ka-band Transceiver for Satellite Communications
2020/08/07
Languages： English
Scientists at Tokyo Institute of Technology and Socionext Inc. have developed a novel transceiver for enabling seamless communication between earth ground platforms and satellites in the low, midd
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300 GHz帯無線トランシーバの省電力化に成功 5Gの先を見据えた超高速無線通信を小型・低コストICで実現
2020/08/06
Languages： Japanese
要点-従来の4分の1以下の消費電力で次世代300GHz帯無線トランシーバを実現-新たに考案したミキサ回路により低コスト化・省面積化・省電力化を達成-スマートフォン等のモバイル機器に搭載可能概要東京工業大学工学院電気電子系の岡田健一教授らと
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Ka帯衛星通信向け無線ICの開発に成功 安価な集積回路で実現、無線機の小型・低コスト化に貢献
2020/08/05
Languages： Japanese
要点-Ka帯衛星通信機能を安価で量産可能なシリコンCMOSチップに集積化-2系統の受信回路を内蔵することで、二偏波MIMOと周波数多重による高速・大容量通信が可能-高速衛星通信向け無線機の小型・低コスト化を実現概要東京工業大学工学院電気電
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2020/06/25
Languages： English
Researchers at Tokyo Institute of Technology (Tokyo Tech) and NEC Corporation have jointly developed a 28-GHz phased-array1 transceiver supporting dual-polarized MIMO2 for fifth-generation mobile
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偏波MIMO対応ミリ波フェーズドアレイ無線機を開発 5Gのさらなる高度化を実現
2020/06/16
Languages： Japanese
要点-256QAM変調による偏波MIMOに世界で初めて成功-アクティブキャンセル技術により単一のアンテナ素子で二信号の同時送受信が可能-安価で量産可能なシリコンCMOS集積回路チップを搭載したミリ波無線機を実現概要国立大学法人東京工業大学工
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Smallest all-digital circuit opens doors to 5 nm next-gen semiconductor
2020/02/12
Languages： English
Scientists at Tokyo Institute of Technology (Tokyo Tech) and Socionext Inc. have designed the world's smallest all-digital phase-locked loop (PLL). PLLs are critical clocking circuits in virtually
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2020/02/10
Languages： Japanese
要点-世界初5nmCMOSプロセスを用いた分数分周型クロック回路を実現-世界最小・最高性能のスペクトル拡散クロック回路の開発に成功-デジタル回路のみで構成でき、自動合成による超短期間設計が可能概要東京工業大学工学院電気電子系の岡田健一教
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A more accurate, low-cost 39 GHz beamforming transceiver for 5G communications
2019/06/03
Languages： English
Researchers at Tokyo Tech and NEC Corporation, Japan, present a 39 GHz transceiver with built-in calibration for fifth-generation (5G) applications. The advantages to be gained include better quality communications as well as cost-effective scalability.
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G向けミリ波フェーズドアレイ無線機を開発 安価な集積回路を用いて高精度指向性制御を実現
2019/06/03
Languages： Japanese
5G向けミリ波帯フェーズドアレイ無線機の開発に成功 安価で量産可能なシリコンCMOS集積回路チップにより実現 高周波信号の位相・振幅ばらつき・補償機構により、高精度に電波の指向性を制御
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Tinier and less power-hungry quantum atomic clock push toward intelligent IoT
2019/02/19
Languages： English
Scientists at Tokyo Tech, Ricoh co. and The National Institute of Advanced Industrial Science and Technology have developed an ultra-low-power atomic clock (ULPAC) for small satellites to enable future communication systems beyond 5G. The proposed device outperforms the current industry standards in various benchmarks, such as size, stability, and power consumption.
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超省エネ・小型の原子時計の開発に成功 自動車やスマートフォン、小型衛星などにも搭載可能な高精度時計
2019/02/19
Languages： Japanese
これまで不可能だった小型電子機器に搭載できる原子時計を開発 従来型の大きな原子時計と同等の周波数安定度を実現、消費電力、サイズを一桁以上低減 政府が進めるIoTが支えるソサエティ5.0（超スマート社会）の実現にも貢献
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水晶発振回路の高速起動化でIoT機器の消費電力を大幅低減 あらゆるものをインターネットでつなげるIoT社会の実現に貢献
2018/06/18
Languages： Japanese
あらゆる電子機器に用いられる水晶発振回路の起動時間について、従来比2倍以上の世界最速起動となる64マイクロ秒を達成しました。 これは起動時の増幅器のみを3段構成とし、容量フィードフォワードパスを追加したことで、理論限界を超える負性抵抗（RN）を生み出した効果です。 水晶発振回路を安定した周波数維持が必要な無線機器に用いる場合、大きな省エネルギー効果が得られ、大きな社会的インパクトを生むと期待されます。
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New 28-GHz transceiver paves the way for future 5G devices
2018/06/13
Languages： English
Scientists at Tokyo Tech have designed and fabricated a tiny, but incredibly fast, reliable, and accurate 28-GHz transceiver meant for stable high-speed 5G communications. The fabricated transceiver trumps previous designs in various regards by taking a new approach for beam steering.
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300 GHz帯で毎秒100ギガビットの無線伝送が可能な超高速ICを開発 未踏のテラヘルツ波周波数の活用を拓く技術として期待
2018/06/11
Languages： Japanese
日本電信電話株式会社（本社：東京都千代田区、代表取締役社長：鵜浦博夫、以下 NTT）と国立大学法人 東京工業大学（東京都目黒区、学長：益一哉、以下 東工大）は、共同で、テラヘルツ波の周波数帯で動作する無線フロントエンド向け超高速ICを開発し、300 GHz帯における世界最高データレートである毎秒100ギガビットの無線伝送に成功しました。
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世界最小電力で動作するBLE無線機を開発 デジタル化で実現、IoTの普及を加速
2018/02/14
Languages： Japanese
新型デジタル発振器により大幅な低消費電力化を達成 IoT機器への幅広い利用を期待
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Tokyo Tech slashes power consumption in Bluetooth Low-Energy transceiver by more than half
2018/02/14
Languages： English
Researchers at Tokyo Institute of Technology (Tokyo Tech) announce a Bluetooth Low-Energy transceiver with the lowest ever power consumption ? a breakthrough set to accelerate widespread adoption of Internet of Things (IoT) applications in Japan and around the globe.
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2018/02/13
Languages： Japanese
広帯域ミリ波無線送受信機を開発安価で量産可能なシリコンCMOS集積回路により実現多値変調を用いた無線伝送実験で毎秒120ギガビットの通信速度を達成
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Speeding up adoption of 5G! Wireless transmission speeds of 120 Gbps achieved
2018/02/13
Languages： English
In an effort to further increase the capacity of wireless equipment, Tokyo Tech and Fujitsu Laboratories Ltd. have developed a CMOS wireless transceiver chip that can process signals at high speeds across a broad range of frequencies, from 70 to 105 gigahertz (GHz), using their own bandwidth-increasing technology. With these developments, they succeeded in achieving wireless transmission speeds of 120 gigabits per second (Gbps), the fastest in the world.
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Tokyo Tech and Fujitsu Achieve Wireless Transmission Speeds of 56 Gbps, World's Fastest
2016/02/10
Languages： English
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世界最高速！毎秒56ギガビットの無線伝送に成功―ミリ波帯無線機をCMOS集積回路で実現―
2016/02/01
Languages： Japanese
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Innovative technology to recover performance of CMOS devices damaged by hot carrier injection
2015/03/12
Languages： English
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新型デジタル発振器を開発 ―電圧サブサンプリングにより低消費電力、低ジッタ実現―
2015/03/10
Languages： Japanese
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ホットキャリアによるトランジスタ性能の劣化を回復 ―電気的な手法で出力電力の再生を実証―
2015/03/09
Languages： Japanese
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28Gb/s wireless data rate achieved with millimeter-wave transceiver
2014/11/18
Languages： English
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Clock generator realized by pure digital circuit
2014/11/05
Languages： English
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クロック生成回路をディジタル回路で構成 －注入同期現象を安定利用、小型・低消費電力を実現－
2014/02/18
Languages： Japanese
東京工業大学大学院理工学研究科の松澤昭教授と岡田健一准教授らの研究グループは、ディジタル回路で構成する新方式のクロック生成回路の作製に成功した。発振器が注入信号に同期して発振をおこす「注入同期現象」を安定的に利用し、フィードフォワード制御による位相同期を行うことにより実現した。従来のクロック生成回路は、帰還(フィードバック)制御による正確な位相同期が必要なため、ディジタル回路では構成できなかった最小加工寸法65nm(ナノメートル)のシリコンCMOS プロセスで試作した新型クロック発生回路は、0.4G～1.4GHz（ギガヘルツ、1GHz は10 億ヘルツ)のクロックを生成可能であり、0.9GHz 出力時の消費電力は0.78mW と非常に低い。0.0066mm2 の極小寸法で実現した。クロック生成回路は、ほぼすべての集積回路に内蔵されており、…
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ミリ波帯無線機で毎秒28Gbit の伝送速度を達成 －64値変復調が可能な世界初の60GHz帯無線機を開発－
2014/02/12
Languages： Japanese
東京工業大学大学院理工学研究科の松澤昭教授と岡田健一准教授らの研究グループは、28Gb/s(毎秒280 億ビット)伝送が可能な60GHz(600 億ヘルツ)ミリ波無線機を開発した。無線信号の位相と振幅の両方を使って一度に6ビット分の情報を送る64QAMという変調方式に対応した世界初の60GHz帯無線機である。従来方式では変調帯域が広げられず、伝送速度を20Gb/s 以上にできなかった。同グループは広帯域化が可能なミキサファースト型の送信機を開発し、この問題を解決した。開発した無線機は最小配線半ピッチ65nm(ナノメートル) のシリコンCMOS プロセスで試作した。IEEE802.11ad/WiGig 規格など60GHz 帯ミリ波無線通信の各種国際標準規格に準拠する無線通信が可能である。消費電力は送信機186mW(ミリワット)、受信機155mW、発振器64mW と低く…
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二重ループ構造により注入同期現象を安定化－小型・低ジッタ・低消費電力のクロック生成を実現－
2013/02/18
Languages： Japanese
東京工業大学大学院理工学研究科の松澤昭教授と岡田健一准教授らの研究グループは、集積回路中での注入同期現象（用語１）の安定化に成功した。注入同期現象をクロック生成に応用すれば、低消費電力で高純度なクロックを生成できることが知られていたが、温度や電源の変動により動作が不安定になる問題があった。同グループは注入同期する発振器を周波数補償ループから分け二重ループ構造として、この問題を解決した。
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Wireless communication at a billion bits per second
2012/02/29
Languages： English
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世界最高のデータ伝送速度6.3Gb/sを実現する低消費電力・広帯域ミリ波無線用LSIを共同開発
2012/02/21
Languages： Japanese
世界最高*1のデータ伝送速度6.3 Gb/sを実現する低消費電力・広帯域ミリ波無線用LSIを共同開発～モバイル機器搭載を想定した低消費電力動作を実現～
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2012/02/21
Languages： English
Sony and Tokyo Tech Jointly Develop Low-power LSIs for Wideband Millimeter-wave Wireless Communications that Achieves the World’s Fastest*1 Data Transfer Rate of 6.3 Gb/s-Low power design specifically for use on mobile devices-
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2011/11/09
Languages： Japanese
東京工業大学大学院理工学研究科の松澤昭教授と岡田健一准教授らの研究グループは、16Gb/s(毎秒160億ビット)伝送が可能な60GHz(600億ヘルツ)ミリ波無線機を開発した。従来の11Gb/s(毎秒110 億ビット)伝送を大幅に上回る成果である。利得の平坦性を改善することにより実現した。同研究グループが以前に開発した一度に多数の情報を送受信できる16QAM（用語1）という変調方式に対応した世界初のダイレクトコンバージョン型無線機（用語2）の技術を元に、負性容量を用いて利得平坦性を改善した。負性容量は、差動増幅器の入出力を容量素子で交差接続することで実現した。
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2010/11/08
Languages： Japanese
東京工業大学大学院理工学研究科の松澤昭教授、岡田健一准教授らの研究グループは雑音を従来の100 分の１以下に低減したミリ波帯局部発振器（用語１）を開発した。20GHz 帯の発振器と60GHz 帯の注入同期型直交局部発振器を組み合わせることにより、世界最高の低位相雑音性能を達成した。 無線通信の周波数帯ひっ迫を解消する技術として60GHz帯（ミリ波帯）の利用が注目されているが、ミリ波帯ではコイルやコンデンサの損失が大きくなり、位相雑音（用語２）特性が劣化するのがネックだった。今回はこれを解決したもので、ミリ波無線通信の実用化につながる成果だ。
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2009/11/17
Languages： Japanese
東京工業大学大学院理工学研究科の松澤昭教授・岡田健一准教授らの研究グループが，従来の10倍以上の周波数可変範囲を持つ電圧制御発振器（用語１）を開発した。位相雑音特性に優れるLC型電圧制御発振器では，通常，最低発振周波数と最高発振周波数の比が2倍程度であった。今回開発した広帯域電圧制御発振器ではLC型電圧制御発振器(VCO: Voltage Controlled Oscillator)と注入同期型周波数分周器を組み合わせることにより，590倍の周波数可変範囲を実現した。90ナノメートル(nm) のシリコンCMOSプロセスを利用して試作した。9.7MHzから5.7GHzの周波数範囲で４相正弦波出力（用語２）が可能である。位相雑音（用語３）の評価指標であるFoMT（用語４）において，世界最高性能であるマイナス210dBc/Hzを達成した。
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2009/06/19
Languages： Japanese
東京工業大学大学院理工学研究科の松澤昭教授・岡田健一准教授らの研究グループは，低電源電圧LSIのクロック生成に必要な電圧制御発振器において，世界で初めて0.2ボルト（V）の電源電圧での動作を可能とする回路方式を開発した。グリーンITに向けた極低消費電力LSIのクロック源として利用できる。
Degree
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Doctor ( 2003.3 Kyoto University )
Research Interests
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Terahertz
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Phased Array
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Millimeter-wave
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Satellite Communication
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CMOS
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Wireless communication
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Semiconductor
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RF circuits
Research Areas
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Informatics / Information network
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Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Communication and network engineering
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Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Electron device and electronic equipment / Integrated Circuits, Wireless Communication, Millimeter-Wave
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Informatics / Computer system
Education
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Kyoto University
2000.4 - 2003.3
Country： Japan
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Kyoto University Graduate School, Division of Information and Communication
1998.4 - 2000.3
Country： Japan
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Kyoto University Faculty of Engineering
- 1998
Country： Japan
Research History
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Institute of Science Tokyo Department of Electrical and Electronic Engineering, School of Engineering Professor
2024.10
Country：Japan
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Tokyo Institute of Technology Department of Electrical and Electronic Engineering, School of Engineering Professor
2019.4 - 2024.9
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Tokyo Institute of Technology Department of Physical Electronics, Graduate School of Science and Engineering Associate Professor
2007.4 - 2019.3
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Tokyo Institute of Technology Integrated Research Institute Assistant Professor
2005.10 - 2007.3
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Tokyo Institute of Technology Precision and Intelligence Laboratory Assistant Professor
2003.4 - 2007.3
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Japan Society for the Promotion of Science Research Fellow
2000.4 - 2003.3
Professional Memberships
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IEEE
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電子通信情報学会
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IEEE
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応用物理学会
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情報処理学会
Papers
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A 55-nm SRAM Chip Scanning Errors Every 125 ns for Event-Wise Soft Error Measurement Reviewed International journal
Yuibi Gomi, Akira Sato, Waleed Madany, Kenichi Okada, Satoshi Adachi, Masatoshi Itoh, Masanori Hashimoto
IEEE Solid-State Circuits Letters 1 - 1 2025.7
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A DPD/Dither-Free DPLL Based on a Cascaded Fractional Divider and Pseudo-Differential DTCs Achieving a -62.1-dBc Fractional Spur Reviewed
Dingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Yuang Xiong, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada
2025 IEEE Journal of Solid-State Circuits (JSSC) 60 ( 6 ) 2106 - 2121 2025.6
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Large-Scale Spaceborne Deployable Active Phased-Array Antenna Design Using Rigid-Flex Boards for LEO Satellite Constellation Reviewed International journal
Hiroki Hayashi, Yasuto Narukiyo, Delburg Mitchao, Sena Kato, Takeshi Ota, Keito Yuasa, Xiaolin Wang, Jill Mayeda, Hiraku Sakamoto, Kenichi Okada, Atsushi Shirane
2025 IEEE 75th Electronic Components and Technology Conference (ECTC) 1 - 7 2025.5
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A 6.65-to-7.75GHz Fractional-N Digital PLL with Analog Pre-Distortion DTC Implementing 2nd/3rd-Order Calibration and Achieving −65.7dBc Fractional Spur and 154fs Integrated Jitter Reviewed International journal
Daxu Zhang, Dingxin Xu, Hongye Huang, Waleed Madany, Zezheng Liu, Wenqian Wang, Yuang Xiong, Ashbir Aviat Fadila, Duo Li, Yuncheng Zhang, Atsushi Shirane, Kenichi Okada
2025 IEEE Custom Integrated Circuits Conference (CICC) 1 - 3 2025.4
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A 2.5 dB noise figure 28 GHz current-reused noise-cancelling LNA with g<sub>m</sub>-boosting in 65 nm CMOS for millimeter-wave MIMO applications Reviewed International journal
Yi Zhang, Minzhe Tang, Dongfan Xu, Jian Pang, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
IEICE Electronics Express 22 ( 6 ) 20250033 - 20250033 2025.3
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A 0.8–1.4-GHz Synthesizable DPLL Using a Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Reviewed International journal
Waleed Madany, Yuncheng Zhang, Ashbir Aviat Fadila, Hongye Huang, Junjun Qiu, Jill Mayeda, Atsushi Shirane, Kenichi Okada
IEEE Access 13 40210 - 40225 2025.3
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A 6.5-to-8-GHz Cascaded Dual-Fractional-N Digital PLL Achieving −52.79-dBc Fractional Spur With 50-MHz Reference Reviewed International journal
Dingxin Xu, Yuncheng Zhang, Hongye Huang, Zheng Sun, Bangan Liu, Ashbir Aviat Fadila, Junjun Qiu, Zezheng Liu, Wenqian Wang, Yuang Xiong, Waleed Madany, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 60 ( 3 ) 1043 - 1055 2025.3
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A 122 GHz Wirelessly Powered Active Reflector for D-Band Communications Reviewed International journal
Michihiro Ide, Keito Yuasa, Sena Kato, Shu Date, Takashi Tomura, Kenichi Okada, Atsushi Shirane
IEEE Solid-State Circuits Letters 8 97 - 100 2025.3
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Millimeter-wave GaAs Rectifier with Differential Signal 4:1 Power Combiner for Simultaneous Wireless Information and Power Transmission Reviewed International journal
Masayuki Kikuchi, Michihiro Ide, Jill Mayeda, Sena Kato, Keito Yuasa, Kenichi Okada, Atsushi Shirane
2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS) 1 - 5 2025.2
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11.1 A 256-Element Ka-Band CMOS Phased-Array Receiver Using Switch-Type Quadrature-Hybrid-First Architecture for Small Satellite Constellations Reviewed International journal
Sena Kato, Jill Mayeda, Keito Yuasa, Michihiro Ide, Takeshi Ota, Shu Date, Yudai Yamazaki, Xiaolin Wang, Xi Fu, Dongwon You, Makoto Higaki, Jumpei Sudo, Hiroshi Takizawa, Masashi Shirakura, Takashi Tomura, Hiroyuki Sakai, Kazuaki Kunihiro, Kenichi Okada, Atsushi Shirane
2025 IEEE International Solid-State Circuits Conference (ISSCC) 1 - 3 2025.2
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5.6 A Power-Efficient CORDIC-Less Digital Polar Transmitter Using 1b DSM-Based PA Supporting 256-QAM Reviewed International journal
Yuncheng Zhang, Zezheng Liu, Duo Li, Minzhe Tang, Yi Zhang, Hongye Huang, Dingxin Xu, Waleed Madany, Ashbir Aviat Fadila, Wenqian Wang, Yuang Xiong, Daxu Zhang, Garry Pranata Kusuma, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
2025 IEEE International Solid-State Circuits Conference (ISSCC) 100 - 103 2025.2
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A 4-Stream 8-Element Time-Division MIMO Phased-Array Receiver for 5G NR and Beyond Achieving 9.6Gbps Data Rate Reviewed International journal
Yi Zhang, Minzhe Tang, Zheng Li, Dongfan Xu, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
Proceedings of the 30th Asia and South Pacific Design Automation Conference 342 - 343 2025.1
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A Tri-Mode Harmonic-Selection Mixer with Multiphase LO Supporting 24.25-71GHz for Multi-Band 5G NR Reviewed International journal
Dongfan Xu, Minzhe Tang, Yi Zhang, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada
Proceedings of the 30th Asia and South Pacific Design Automation Conference 352 - 353 2025.1
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A D-Band CMOS Transceiver Chipset Supporting 640Gb/s Date Rate with 4?4 Line-of-Sight MIMO Reviewed International journal
Chenxin Liu, Zheng Li, Yudai Yamazaki, Hans Herdian, Chun Wang, Anyi Tian, Jun Sakamaki, Han Nie, Xi Fu, Sena Kato, Wenqian Wang, Hongye Huang, Shinsuke Hara, Akifumi Kasamatsu, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
Proceedings of the 30th Asia and South Pacific Design Automation Conference 354 - 355 2025.1
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A Low-Jitter and Spur Dual-Edge Sub-Sampling Phase-Locked Loop With Double-Balanced Sampling Mixer-Adopted Phase Detector
Anshul Verma, Bishnu Prasad Das, Pratap Narayan Singh, Kenichi Okada
IEEE Transactions on Microwave Theory and Techniques 2025
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Experimental Testbed for Frequency-Division Multiplexed Joint Radar–Communication System Validation in D-Band Using a 65-nm CMOS Communication Transceiver
Carrel da Gomez, Chenxin Liu, Hans Herdian, Hiroyuki Sakai, Kazuaki Kunihiro, Kenichi Okada
IEEE Access 2025
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Heterogenous TRXs Exploiting Simultaneous Transmit and Receive in SATCOM Phased Arrays
Jill Mayeda, Xiaolin Wang, Sena Kato, Dongwon You, Xi Fu, Takashi Tomura, Hiroyuki Sakai, Kazuaki Kunihiro, Kenichi Okada, Atsushi Shirane
IEEE Transactions on Microwave Theory and Techniques 2025
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A 640-Gb/s 4 x 4-MIMO D-Band CMOS Transceiver Chipset Reviewed International journal
Chenxin Liu, Zheng Li, Yudai Yamazaki, Hans Herdian, Chun Wang, Anyi Tian, Jun Sakamaki, Han Nie, Xi Fu, Sena Kato, Wenqian Wang, Hongye Huang, Minzhe Tang, Dingxin Xu, Shinsuke Hara, Akifumi Kasamatsu, Takashi Tomura, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
IEEE JOURNAL OF SOLID-STATE CIRCUITS 2024.12
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A synthesizable spread spectrum clock generator based on type-II/III fractional-N DPLL Reviewed International journal
Waleed Madany, Hòngyé Huáng, Bangan Liu, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Junjun Qiu, Jill Mayeda, Atsushi Shirane, Kenichi Okada
IEICE Electronics Express 21 ( 22 ) 20240500 - 20240500 2024.11
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35-60GHz Switchless IF Bi-Directional Amplifier Using 65nm CMOS for 300GHz-Band Transceivers Reviewed International journal
Abanob Shehata, Hans Herdian, Chun Wang, Chenxin Liu, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
2024 IEEE Asian Solid-State Circuits Conference (A-SSCC) 1 - 3 2024.11
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A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS Reviewed International journal
Takaya Uchino, Yudai Yamazaki, Sungwan Park, Chenxin Liu, Anyi Tian, Abanob Shehata, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
2024 IEEE Asian Solid-State Circuits Conference (A-SSCC) 1 - 3 2024.11
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Beam Control Free Transceiver Using CMOS 4x4 Matrix for 5G Relay Communication and Wireless Power Transfer Reviewed International journal
Shu Date, Keito Yuasa, Michihiro Ide, Sena Kato, Kenichi Okada, Atsushi Shirane
2024 IEEE Asia-Pacific Microwave Conference (APMC 2024) 713 - 715 2024.11
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A Fully Synthesizable Fractional-N MDLL With Energy-Efficient Ring-Oscillator-Based DTC of Large Tuning Range International journal
Hóngyè Huáng, Bangan Liu, Zezheng Liu, Dingxin Xu, Yuncheng Zhang, Waleed Madany, Junjun Qiu, Zheng Sun, Ashbir Aviat Fadila, Jian Pang, Zheng Li, Dongwon You, Atsushi Shirane, Kenichi Okada
IEEE Solid-State Circuits Letters 7 54 - 57 2024.11
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Millimeter-Wave Transceiver Utilizing On-Chip Butler Matrix for Simultaneous 5G Relay Communication and Wireless Power Transfer Reviewed International journal
Keito YUASA, Michihiro IDE, Sena KATO, Kenichi OKADA, Atsushi SHIRANE
IEICE Transactions on Electronics E107.C ( 10 ) 408 - 415 2024.10
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A Proton Irradiated CMOS On-Chip Vivaldi Antenna for 300 GHz Band Slat Array Implementation Reviewed International journal
Hans Herdian, Chun Wang, Takeshi Inoue, Atsushi Shirane, Kenichi Okada
IEEE Open Journal of Antennas and Propagation 5 ( 5 ) 1390 - 1402 2024.10
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5G NR Transceiver and 24GHz Wireless Power Receiver Utilizing a Low Insertion Loss Differential Output Butler Matrix for Long-Range Wireless Transmission Reviewed International journal
Keito Yuasa, Michihiro Ide, Sena Kato, Takashi Tomura, Kenichi Okada, Atsushi Shirane
2024 54th European Microwave Conference (EuMC) 892 - 895 2024.9
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A Low-Loss 220GHz-325GHz Marchand Balun in 65nm CMOS Technology Reviewed International journal
Anyi Tian, Chenxin Liu, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
2024 54th European Microwave Conference (EuMC) 1026 - 1029 2024.9
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A 225-264 GHz Wideband Amplifier in 65 nm CMOS with Optimized 10 μm Transistor Layout Reviewed International journal
Olivia Angel Yong, Chun Wang, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
2024 54th European Microwave Conference (EuMC) 816 - 819 2024.9
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Digital Phase-Locked Loops: Exploring Different Boundaries Invited Reviewed International journal
Yuncheng Zhang, Dingxin Xu, Kenichi Okada
IEEE Open Journal of the Solid-State Circuits Society 4 176 - 192 2024.9
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Radiation-Tolerant Ka-Band Deployable Phased-Array Transceiver for Low-Earth Orbit Small Satellite Constellation Reviewed International journal
Yasuto Narukiyo, Xi Fu, Dongwon You, Takashi Tomura, Hiraku Sakamoto, Kenichi Okada, Atsushi Shirane
Small Satellite Conference, 2024.8
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A D-Band CMOS Transceiver Chipset for 640-Gb/s Data Rate with 4x4-MIMO Invited Reviewed International journal
Chenxin Liu, Kenichi Okada
IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) 2024.8
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Power Supply and RF Signal Routing Architecture Design for Ultralight Deployable Ka-Band Active Phased-Array Transceivers Reviewed International journal
Hiroki Hayashi, Yasuto Narukiyo, Delburg Mitchao, Yuki Takeda, Suk So Yeon, Hikaru Sakamoto, Kenichi Okada, Atsushi Shirane
Small Satellite Conference 2024.8
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Development of Multifunctional Lightweight Membrane Structure for Antennas and Power Generation on Small Satellites Reviewed International journal
Yuto Nakagawa, Masanori Matsushita, Yuki Takao, Ahmed Kiyoshi Sugihara, Osamu Mori, Tetsuya Kusumoto, Haruhito Ohki, Kaho Nakagawa, Shusaku Tsuruya, Yukiho Ohtsuki, Sho Nishimura, Masahiro Fujita, Hiroaki Yoneda, Shun Yasuda, Tomoyo Shibata, Toshiyuki Hori, Hiroaki Ito, Akihito Watanabe, Sota Kume, Atsuki Ochi, Sora Kanamaru, Motoki Moritani, Hiraku Sakamoto, Atsushi Shirane, Kenichi Okada, Ayako Torisaka, Nobukatsu Okuizumi, Yasutaka Satou, Yasuyuki Miyazaki, Atsuhiko Senba
Small Satellite Conference, 2024.8
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Design of Synthesizable Digital Phase Locked Loops Invited Reviewed International journal
Yuncheng Zhang, Kenichi Okada
IPSJ Transactions on System and LSI Design Methodology 17 44 - 54 2024.6
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Dual-Layer Proton Irradiation for Passive Component Enhancement and Noise Coupling Suppression on CMOS Process Reviewed International journal
Hans Herdian, Takeshi Inoue, Atsushi Shirane, Kenichi Okada
IEEE Transactions on Electron Devices 71 ( 8 ) 4498 - 4503 2024.6
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A K/Ka-Band Satellite Terminal Beamforming Front-End-Module Utilizing Dual-Band Self-Diplexing Antennas Reviewed International journal
Jill Mayeda, Dongwon You, Xi Fu, Xiaolin Wang, Hans Heridian, Michihiro Ide, Takashi Tomura, Hero Sakai, Kazuaki Kunihiro, Kenichi Okada, Atsushi Shirane
2024 IEEE/MTT-S International Microwave Symposium - IMS 2024 327 - 330 2024.6
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A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond Reviewed International journal
Yi Zhang, Minzhe Tang, Jian Pang, Zheng Li, Dongfan Xu, Dingxin Xu, Yuncheng Zhang, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 1 - 2 2024.6
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A 640-Gb/s $4\times 4$-MIMO D-Band CMOS Transceiver Chipset Reviewed International journal
Chenxin Liu, Zheng Li, Yudai Yamazaki, Hans Herdian, Chun Wang, Anyi Tian, Jun Sakamaki, Han Nie, Xi Fu, Sena Kato, Wenqian Wang, Hongye Huang, Shinsuke Hara, Akifumi Kasamatsu, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 1 - 2 2024.6
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A 28GHz 5G NR Wirelessly Powered Relay Transceiver Using Rectifier-Type 4th-Order Sub-Harmonic Mixer Reviewed International journal
Sena Kato, Shu Date, Tao Ruoxin, Yasuto Narukiyo, Hiroki Hayashi, Keito Yuasa, Michihiro Ide, Takashi Tomura, Kenichi Okada, Atsushi Shirane
2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 1 - 2 2024.6
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A 256-Element Phased-Array Relay Transceiver for 5G Network Using 24-GHz Wireless Power Transfer With Discrete ICs Reviewed International journal
Michihiro Ide, Keito Yuasa, Sena Kato, Takashi Tomura, Kenichi Okada, Atsushi Shirane
IEEE Microwave and Wireless Technology Letters 34 ( 6 ) 793 - 796 2024.6
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A 24–71-GHz Tri-Mode Mixer Using Harmonic Selection for Multi-Band 5G NR Reviewed International journal
Dongfan Xu, Minzhe Tang, Yi Zhang, Zheng Li, Atsushi Shirane, Kenichi Okada
2024 IEEE International Symposium on Circuits and Systems (ISCAS) 1 - 4 2024.5
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A Peak-detector-based Ultra Low Power ECG ASIC for Early Detection of Cardio-Vascular Diseases Reviewed International coauthorship International journal
Sidharth Thomas, Jaskirat Singh Virdi, Anshul Verma, Bishnu Prasad Das, Kenichi Okada, Pratap Narayan Singh
2024 IEEE International Symposium on Circuits and Systems (ISCAS) 1 - 5 2024.5
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A VCO With Robust Implicit Common-Mode Resonance Against Nonideal Decoupling Network Reviewed International journal
Dingxin Xu, Zheng Sun, Yuang Xiong, Yuncheng Zhang, Hongye Huang, Zezheng Liu, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada
IEEE Solid-State Circuits Letters 7 171 - 174 2024.5
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Conductive and Capacitive Properties of Couplers under Seawater for Electric Wireless Power Transfer Reviewed International journal
Ning Li, Kosuke Iguchi, Xuefeng Liu, Atsushi Shirane, Kenichi Okada, Takeshi Shinkai
2024 IEEE Wireless Power Technology Conference and Expo (WPTCE) 308 - 311 2024.5
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Guest Editorial Introduction to the Special Section on the 2023 RFIC Symposium Invited International journal
Kenichi Okada
IEEE Journal of Solid-State Circuits 59 ( 5 ) 1300 2024.5
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A D-Band Wideband Single-Ended Neutralized Upconversion Mixer With Controlled LO Feedthrough in 65-nm CMOS Reviewed International journal
Chun Wang, Chenxin Liu, Hans Herdian, Abanob Shehata, Jill Mayeda, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
IEEE Solid-State Circuits Letters 7 167 - 170 2024.4
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A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference Cancellation and LO Feedthrough Suppression Reviewed International journal
Chun Wang, Ibrahim Abdo, Chenxin Liu, Carrel Da Gomez, Jill Mayeda, Hans Herdian, Wenqian Wang, Xi Fu, Dongwon You, Abanob Shehata, Sunghwan Park, Yun Wang, Jian Pang, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 59 ( 4 ) 978 - 992 2024.4
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A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter Reviewed International journal
Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 59 ( 4 ) 993 - 1005 2024.4
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10.3 A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter Reviewed International journal
Dingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Yuang Xiong, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada
2024 IEEE International Solid-State Circuits Conference (ISSCC) 192 - 194 2024.2
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24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOS Reviewed International journal
Chun Wang, Hans Herdian, Wenbin Zheng, Chenxin Liu, Jill Mayeda, Yuxuan Liu, Olivia Angel Yong, Wenqian Wang, Yuncheng Zhang, Carrel Da Gomez, Abanob Shehata, Sena Kato, Ibrahim Abdo, Teruo Jyo, Hiroshi Hamada, Hiroyuki Takahashi, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
2024 IEEE International Solid-State Circuits Conference (ISSCC) 415 - 417 2024.2
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A Low-Power Radiation-Hardened Ka-Band CMOS Phased-Array Receiver for Small Satellite Constellation Reviewed International journal
Xi Fu, Dongwon You, Yun Wang, Xiaolin Wang, Ashibir Aviat Fadila, Chenxin Liu, Sena Kato, Chun Wang, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 59 ( 2 ) 349 - 363 2024.2
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A Low-Power 256-Element Ka-Band CMOS Phased-Array Receiver with On-Chip Distributed Radiation Sensors for Small Satellite Constellations
Xi Fu, Dongwon You, Xiaolin Wang, Yun Wang, Carolyn Jill Mayeda, Yuan Gao, Michihiro Ide, Yuncheng Zhang, Jun Sakamaki, Ashibir Aviat Fadila, Zheng Li, Jumpei Sudo, Makoto Higaki, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane
IEEE Journal of Solid-State Circuits 58 ( 12 ) 3380 - 3395 2023.12
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A 37–43.5-GHz Phase and Amplitude Detection Circuit With 0.049° and 0.036-dB Accuracy for 5G Phased-Array Calibration Using Transformer-Based Injection-Enhanced ILFD
Yudai Yamazaki, Jun Sakamaki, Jian Pang, Joshua Alvin, Zheng Li, Dongwon You, Jill Mayeda, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 58 ( 10 ) 2851 - 2860 2023.10
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Yudai Yamazaki, Joshua Alvin, Jian Pang, Atsushi Shirane, Kenichi Okada
IEICE Transactions on Electronics 106 ( 4 ) 149 - 156 2023.4
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A Ka-Band Deployable Active Phased Array Transmitter Fabricated on 4-Layer Liquid Crystal Polymer Substrate for Small-Satellite Mount
Dongwon You, Xiaolin Wang, Hans Herdian, Xi Fu, Hojun Lee, Michihiro Ide, Carrel Da Gomez, Zheng Li, Jill Mayeda, Daisuke Awaji, Jian Pang, Hiraku Sakamoto, Kenichi Okada, Atsushi Shirane
IEEE Access 11 69522 - 69535 2023
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A 2.95mW/element Ka-band CMOS Phased-Array Receiver Utilizing On-Chip Distributed Radiation Sensors in Low-Earth-Orbit Small Satellite Constellation
Xi Fu, Dongwon You, Xiaolin Wang, Michihiro Ide, Yuncheng Zhang, Jun Sakamaki, Ashibir Aviat Fadila, Zheng Li, Yun Wang, Jumpei Sudo, Makoto Higaki, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 2023-February 296 - 298 2023
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Beam Control Free 28GHz 5G Relay Transceiver and 24GHz Wireless Power Receiver Using On-Chip Butler Matrix
Keito Yuasa, Michihiro Ide, Sena Kato, Kenichi Okada, Atsushi Shirane
IEEE MTT-S International Microwave Symposium Digest 2023-June 199 - 202 2023
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A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference Cancellation and LO Feedthrough Suppression
Chun Wang, Ibrahim Abdo, Chenxin Liu, Carrel Da Gomez, Hans Herdian, Wenqian Wang, Xi Fu, Dongwon You, Abanob Shehata, Sunghwan Park, Yun Wang, Jian Pang, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
Digest of Technical Papers - Symposium on VLSI Technology 2023-June 2023
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A Dual-Mode Bi-Directional CMOS Mixer Using Push-Push Doubler for 300GHz-Band Transceivers
Chenxin Liu, Ibrahim Abdo, Chun Wang, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada
European Solid-State Circuits Conference 2023-September 69 - 72 2023
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A 24-49-GHz CMOS Area-Efficient Phase-Invariant Mixed-Type Attenuator With Capacitive Compensation for 5G New Radio
Zheng Li, Peng Luo, Jian Pang, Qiaoyu Wang, Atsushi Shirane, Kenichi Okada
European Solid-State Circuits Conference 2023-September 449 - 452 2023
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Millimeter-wave Beamforming IC and Antenna Modules with Bi-directional Transceiver Architecture
Naoki Oshima, Shinichi Hori, Jian Pang, Atsushi Shirane, Kenichi Okada, Kazuaki Kunihiro
NEC Technical Journal 17 ( 1 ) 47 - 51 2023
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A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path
Waleed Madany, Yuncheng Zhang, Ashbir Aviat Fadila, Hongye Huang, Junjun Qiu, Atsushi Shirane, Kenichi Okada
European Solid-State Circuits Conference 2023-September 265 - 268 2023
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A 19–34-GHz Bridged-T Phase Shifter With High-Pass Phase Compensation Achieving 3.9° RMS Phase Error for 5G NR
Yijing Liao, Minzhe Tang, Jian Pang, Atsushi Shirane, Kenichi Okada
IEEE Solid-State Circuits Letters 6 233 - 236 2023
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A 60-GHz Transformer-Based Power Amplifier Supporting 5G n263-band Applications
Junqing Liu, Zheng Li, Minghao Fan, Yilun Chen, Atsushi Shirane, Kenichi Okada
Proceedings of the 2023 International Conference on IC Design and Technology, ICICDT 2023 48 - 51 2023
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Dingxin Xu, Yuncheng Zhang, Hongye Huang, Zheng Sun, Bangan Liu, Ashbir Aviat Fadila, Junjun Qiu, Zezheng Liu, Wenqian Wang, Yuang Xiong, Waleed Madany, Atsushi Shirane, Kenichi Okada
IEEE Custom Integrated Circuits Conference(CICC) 2023-April 1 - 2 2023
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Junjun Qiu, Wenqian Wang, Zheng Sun, Bangan Liu, Yuncheng Zhang, Dingxin Xu, Hongye Huang, Ashbir Aviat Fadila, Zezheng Liu, Waleed Madany, Yuang Xiong, Atsushi Shirane, Kenichi Okada
IEEE International Solid- State Circuits Conference(ISSCC) 2023-February 80 - 81 2023
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A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter
Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada
Digest of Technical Papers - Symposium on VLSI Technology 2023-June 2023
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A Compact 28 GHz Bi-Directional Power-Combined Antenna Interface in WLCSP for 5G and B5G Transceivers
Jian Pang, Zheng Li, Yi Zhang, Minzhe Tang, Minghao Fan, Atsushi Shirane, Kenichi Okada
IEEE Solid-State Circuits Letters 6 149 - 152 2023
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Zheng Li, Jian Pang, Yi Zhang 0092, Yudai Yamazaki, Qiaoyu Wang, Peng Luo, Weichu Chen, Yijing Liao, Minzhe Tang, Yun Wang 0008, Xi Fu, Dongwon You, Naoki Oshima, Shinichi Hori, Jeehoon Park, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 58 ( 4 ) 901 - 914 2023
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19.4 A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active Coupler
Dongwon You, Xi Fu, Xiaolin Wang, Yuan Gao, Wenqian Wang, Jun Sakamaki, Hans Herdian, Sena Kato, Michihiro Ide, Yuncheng Zhang, Ashbir Aviat Fadila, Zheng Li, Chun Wang, Yun Wang, Jumpei Sudo, Makoto Higaki, Nahoka Kawaguchi, Masaya Nitta, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 2023-February 298 - 300 2023
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A 41-GHz 19.4-dBm Psat CMOS Doherty power amplifier for 5G NR applications.
Zheng Li, Zixin Chen, Qiaoyu Wang, Junqing Liu, Jian Pang, Atsushi Shirane, Kenichi Okada
IEICE Electronic Express 20 ( 5 ) 20220558 - 20220558 2023
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Xi Fu, Yun Wang 0008, Dongwon You, Xiaolin Wang, Ashbir Aviat Fadila, Yi Zhang 0092, Sena Kato, Chun Wang, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada
ISSCC 2022-February 90 - 92 2022
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A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station
Zheng Li, Jian Pang, Yi Zhang, Yudai Yamazaki, Qiaoyu Wang, Peng Luo, Weichu Chen, Yijing Liao, Minzhe Tang, Zhengyan Guo, Yun Wang, Xi Fu, Dongwon You, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada
Digest of Technical Papers - Symposium on VLSI Technology 2022-June 98 - 99 2022
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A 28-GHz Fully-Passive Retro-Reflective Phased-Array Backscattering Transceiver for 5G Network with 24-GHz Beam-Steered Wireless Power Transfer
Michihiro Ide, Yuasa Keito, Kato Sena, Dongwon You, Ashbir Aviat Fadila, Jian Pang, Atsushi Shirane, Kenichi Okada
Digest of Technical Papers - Symposium on VLSI Technology 2022-June 96 - 97 2022
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A Flexible Implementation of Ka-Band Active Phased Array for Satellite Communication
Xiaolin Wang, Dongwon You, Xi Fu, Hojun Lee, Zheng Li, Daisuke Awaji, Jian Pang, Atsushi Shirane, Hiraku Sakamoto, Kenichi Okada
IEEE MTT-S International Microwave Symposium Digest 2022-June 753 - 756 2022
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A Ka-Band Dual Circularly Polarized CMOS Transmitter with Adaptive Scan Impedance Tuner and Active XPD Calibration Technique for Satellite Terminal
Dongwon You, Yun Wang, Xi Fu, Hans Herdian, Xiaolin Wang, Ashbir Fadila, Hojun Lee, Michihiro Ide, Sena Kato, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 2022-June 15 - 18 2022
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A 28GHz Area-Efficient CMOS Vector-Summing Phase Shifter Utilizing Phase-Inverting Type-I Poly-Phase Filter for 5G New Radio
Minzhe Tang, Yi Zhang, Jian Pang, Atsushi Shirane, Kenichi Okada
ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings 333 - 336 2022
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An 8.5-dB Insertion Loss and 0.8° RMS Phase Error Ka-Band CMOS Hybrid Phase Shifter Featuring Nonuniform Matching for Satellite Communication
FU Xi, WANG Yun, WANG Xiaolin, GU Xiaofan, LUO Xueting, LI Zheng, PANG Jian, SHIRANE Atsushi, OKADA Kenichi
IEICE Transactions on Electronics advpub ( 10 ) 552 - 560 2022
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A Low-power Digital Baseband Circuit for GMSK Demodulation in Sub-GHz Application
Qiu Junjun, Liu Bangan, Zhang Yuncheng, Shirane Atsushi, Okada Kenichi
IEICE Electronics Express advpub ( 12 ) 20220201 - 20220201 2022
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ZHANG Yuncheng, LIU Bangan, SOMEYA Teruki, WU Rui, QIU Junjun, SHIRANE Atsushi, OKADA Kenichi
IEICE Transactions on Electronics advpub ( 7 ) 334 - 342 2022
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A 1-Bit-DSM-Based Digital Polar Power Amplifier Supporting 1024-QAM
Zhang, Y., Liu, B., Qiu, J., Shirane, A., Okada, K.
IEEE Solid-State Circuits Letters 5 130 - 133 2022
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Abdo, I., da Gomez, C., Wang, C., Hatano, K., Li, Q., Liu, C., Yanagisawa, K., Fadila, A.A., Fujimura, T., Miura, T., Tokgoz, K.K., Pang, J., Hamada, H., Nosaka, H., Shirane, A., Okada, K.
IEEE Journal of Solid-State Circuits 57 ( 8 ) 2292 - 2308 2022
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300GHz-Band CMOS Bi-Directional Transceiver for 6G Phased-Array Applications
Ibrahim Abdo, Atsushi Shirane, Kenichi Okada
GSMM 2022 - 14th Global Symposium on Millimeter-Waves and Terahertz 215 - 216 2022
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A CMOS 24-30 GHz Low-Phase-Variation Variable Gain Amplifier Design for 5G New Radio
Junjun Qiu, Jian Pang, Bangan Liu, Xueting Luo, Yun Wang, Yuncheng Zhang, Atsushi Shirane, Kenichi Okada
IEEE Solid-State Circuits Letters 5 146 - 149 2022
-
Ibrahim Abdo, Korkut Kaan Tokgoz, Atsushi Shirane, Kenichi Okada
IEICE Trans. Electron. 105-C ( 3 ) 118 - 125 2022
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Yun Wang 0008, Dongwon You, Xi Fu, Takeshi Nakamura, Ashbir Aviat Fadila, Teruki Someya, Atsuhiro Kawaguchi, Junjun Qiu, Jian Pang, Kiyoshi Yanagisawa, Bangan Liu, Yuncheng Zhang, Haosheng Zhang, Rui Wu 0001, Shunichiro Masaki, Daisuke Yamazaki, Atsushi Shirane, Kenichi Okada
IEEE J. Solid State Circuits 57 ( 2 ) 356 - 370 2022
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Jian Pang, Xueting Luo, Zheng Li, Atsushi Shirane, Kenichi Okada
IEICE Trans. Electron. 105-C ( 3 ) 102 - 109 2022
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A 41-GHz 19.4-dBm P<inf>SAT</inf>CMOS Doherty Power Amplifier for 5G NR Applications
Zheng Li, Zixin Chen, Qiaoyu Wang, Jian Pang, Atsushi Shirane, Kenichi Okada
Proceedings of 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022 32 - 33 2022
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A 1.8-67GHz Divide-by-4 ILFD Using Area-Efficient Transformer-Based Injection-Enhancing Technique
Yudai Yamazaki, Jian Pang, Atsushi Shirane, Kenichi Okada
ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings 393 - 396 2022
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A 37-39GHz Phase and Amplitude Detection Circuit with 0.060 degree and 0.043dB RMS Errors for the Calibration of 5GNR Phased-Array Beamforming
Yudai Yamazaki, Jun Sakamaki, Jian Pang, Joshua Alvin, Zheng Li, Atsushi Shirane, Kenichi Okada
2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022 - Proceedings 2022
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Millimeter-Wave CMOS Phased-Array Transceivers for 5G and beyond
Kenichi Okada, Jian Pang, Atsushi Shirane, Zheng Li, Yi Zhang, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro
IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2022-September 219 - 221 2022
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Maximizing Energy Efficiency in Sub-THz Radio Communication and Prospective toward 6G
Kenichi Okada
2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2022 2022
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A 220-294 GHz Power Amplifier with 10-dBm P<inf>sat</inf>and 2.2% PAE in 250-nm InP DHBT
Teruo Jyo, Hiroshi Hamada, Munehiko Nagatani, Hitoshi Wakita, Ibrahim Abdo, Miwa Mutoh, Yuta Shiratori, Kenichi Okada, Atsushi Shirane, Hiroyuki Takahashi
2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2022 152 - 155 2022
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A 300-GHz Band Chip-to-Waveguide Transition on Proton-Irradiated Standard 65nm CMOS Si Substrate for Flip-Chip Packaging Implementation
Hans Herdian, Takeshi Inoue, Masatsugu Sogabe, Atsushi Shirane, Kenichi Okada
IEEE MTT-S International Microwave Symposium Digest 2022-June 673 - 675 2022
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Yi Zhang 0092, Jian Pang, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 57 ( 12 ) 3617 - 3630 2022
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A Low-Profile, Scalable 28-GHz Phased Array Antenna in Fan-Out Wafer-Level Package for 5G Communication
Naoki Oshima, Shinichi Hori, Jian Pang, Atsushi Shirane, Kenichi Okada, Kazuaki Kunihiro
Asia-Pacific Microwave Conference Proceedings, APMC 2022-November 359 - 361 2022
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A CMOS Full-Wave Switching Rectifier with Frequency Up-Down Conversion for 5G NR Wirelessly-Powered Relay Transceivers
Sena Kato, Keito Yuasa, Michihiro Ide, Atsushi Shirane, Kenichi Okada
ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings 345 - 348 2022
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Jian Pang, Yi Zhang 0092, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada
ISSCC 2022-February 434 - 436 2022
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Performance Evaluation of Classification and Verification with Quadrant IQ Transition Image.
Hiro Tamura, Kiyoshi Yanagisawa, Atsushi Shirane, Kenichi Okada
IEICE Trans. Commun. 105-B ( 5 ) 580 - 587 2022
-
RF and Optical Hybrid LEO Communication System for Non-Terrestrial Network
Takashi Eishima, Soichiro Inoue, Akihiro Yonemoto, Jumpei Sudo, Takayuki Hosonuma, Shinichi Nakasuka, Atsushi Shirane, Takashi Tomura, Kenichi Okada, Kosuke Kiyohara
2022 IEEE International Conference on Space Optical Systems and Applications, ICSOS 2022 93 - 99 2022
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CMOS THz Phased-Array Transceivers for beyond 5G
Kenichi Okada
2021 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2021 2021.8
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Zheng Sun, Hanli Liu, Dingxin Xu, Hongye Huang, Bangan Liu, Zheng Li, Jian Pang, Teruki Someya, Atsushi Shirane, Kenichi Okada
IEICE Transactions on Electronics E104.C ( 7 ) 289 - 299 2021.7
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Xi Fu, Yun Wang, Zheng Li, Atsushi Shirane, Kenichi Okada
IEICE Transactions on Electronics E104.C ( 7 ) 280 - 288 2021.7
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A Ka-Band 16-Element Deployable Active Phased Array Transmitter for Satellite Communication
Dongwon You, Yuta Takahashi, Shinji Takeda, Motoki Moritani, Haruki Hagiwara, Shuhei Koike, Hojun Lee, Yun Wang, Zheng Li, Jian Pang, Atsushi Shirane, Hiraku Sakamoto, Kenichi Okada
IEEE MTT-S International Microwave Symposium Digest 2021-June 799 - 802 2021.6
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22.2 A 300GHz-Band Phased-Array Transceiver Using Bi-Directional Outphasing and Hartley Architecture in 65nm CMOS
Ibrahim Abdo, Carrel Da Gomez, Chun Wang, Kota Hatano, Qi Li, Chenxin Liu, Kiyoshi Yanagisawa, Ashbir Aviat Fadila, Jian Pang, Hiroshi Hamada, Hideyuki Nosaka, Atsushi Shirane, Kenichi Okada
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 64 316 - 318 2021.2
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32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth
Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Atsushi Shirane, Kenichi Okada
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 64 454 - 456 2021.2
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A Fully Synthesizable Fractional-N MDLL with Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration
Bangan Liu, Yuncheng Zhang, Junjun Qiu, Huy Cu Ngo, Wei Deng, Kengo Nakata, Toru Yoshioka, Jun Emmei, Jian Pang, Aravind Tharayil Narayanan, Haosheng Zhang, Teruki Someya, Atsushi Shirane, Kenichi Okada
IEEE Transactions on Circuits and Systems I: Regular Papers 68 ( 2 ) 603 - 616 2021.2
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28GHz Phase Shifter with Temperature Compensation for 5G NR Phased-array Transceiver
Yi Zhang, Jian Pang, Kiyoshi Yanagizawa, Atsushi Shirane, Kenichi Okada
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 847 - 852 2021.1
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A DSM-based Polar Transmitter with 23.8% System Efficiency
Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Atsushi Shirane, Kenichi Okada
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 291 - 296 2021.1
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A 0.41W 34Gb/s 300GHz CMOS Wireless Transceiver
Ibrahim Abdo, Takuya Fujimura, Tsuyoshi Miura, Korkut K. Tokgoz, Atsushi Shirane, Kenichi Okada
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 43 - 48 2021.1
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A High Accuracy Phase and Amplitude Detection Circuit for Calibration of 28GHz Phased Array Beamformer System
Joshua Alvin, Jian Pang, Atsushi Shirane, Kenichi Okada
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 93 - 94 2021.1
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A 0.85mm2BLE Transceiver Using an On-Chip Harmonic-Suppressed RFIO Circuitry with T/R Switch
Zheng Sun, Hanli Liu, Hongye Huang, Dexian Tang, DIngxin Xu, Tohru Kaneko, Zheng Li, Jian Pang, Rui Wu, Wei Deng, Atsushi Shirane, Kenichi Okada
IEEE Transactions on Circuits and Systems I: Regular Papers 68 ( 1 ) 196 - 209 2021.1
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A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems
Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Rui Wu, Yun Wang, Dongwon You, Bangan Liu, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 56 ( 4 ) 1310 - 1326 2021
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64QAM wireless link with 300GHz InP-CMOS hybrid transceiver
Ibrahim Abdo, Hiroshi Hamada, Hideyuki Nosaka, Atsushi Shirane, Kenichi Okada
IEICE Electronics Express 18 ( 17 ) 20210314 - 20210314 2021
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A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth.
Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang 0008, Jian Pang, Hanli Liu, Masaya Miyahara, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 56 ( 12 ) 3741 - 3755 2021
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Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Kiyoshi Yanagisawa, Yi Zhang 0092, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Weichu Chen, Yun Wang 0008, Dongwon You, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
2021 Symposium on VLSI Circuits 2021-June 1 - 2 2021
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Hans Herdian, Takeshi Inoue, Takuichi Hirano, Masatsugu Sogabe, Atsushi Shirane, Kenichi Okada
ESSDERC 2021-September 191 - 194 2021
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Michihiro Ide, Atsushi Shirane, Kiyoshi Yanagisawa, Dongwon You, Jian Pang, Kenichi Okada
2021 Symposium on VLSI Circuits 2021-June ( 4 ) 1 - 2 2021
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300GHz Band On-Chip Vivaldi Antenna on Dual-Layer Proton Irradiated CMOS Si Substrate
Hans Herdian, Takeshi Inoue, Takuichi Hirano, Masatsugu Sogabe, Atsushi Shirane, Kenichi Okada
Asia-Pacific Microwave Conference Proceedings, APMC 2021-November 440 - 442 2021
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Zheng Sun, Dingxin Xu, Junjun Qiu, Zezheng Liu, Yuncheng Zhang, Hongye Huang, Hanli Liu, Bangan Liu, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada
47th ESSCIRC 2021 - European Solid State Circuits Conference(ESSCIRC) 499 - 502 2021
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A 28GHz Bi-direction Transceiver with Temperature Compensation
Yi Zhang, Jian Pang, Zheng Li, Atsushi Shirane, Kenichi Okada
2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021 80 - 81 2021
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A 39GHz Divide-by-8 LC-Ring ILFD Designed for 5G New Radio n260 Band
Yudai Yamazaki, Joshua Alvin, Jian Pang, Atsushi Shirane, Kenichi Okada
2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021 74 - 75 2021
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A Flexible Element Antenna for Ka-Band Active Phased Array SATCOM Transceiver
Dongwon You, Daisuke Awaji, Atsushi Shirane, Hiraku Sakamoto, Kenichi Okada
Asia-Pacific Microwave Conference Proceedings, APMC 2020-December 991 - 993 2020.12
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A Compact 37-40GHz CMOS Switch-Type Phase Shifter with Fine-Tuning Stage Achieving 0.4-dB RMS Gain Error
Jian Pang, Xueting Luo, Zheng Li, Atsushi Shirane, Kenichi Okada
Proceedings of 2020 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2020 5 - 6 2020.11
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A Cmos ka-band wireless transceiver for future non-Terrestrial 6g networks
Atsushi Shirane, Yun Wang, Kenichi Okada
2020 IEEE 15th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2020 - Proceedings 2020.11
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A compact TF-based LC-VCO with ultra-low-power operation and supply pushing reduction for iot applications
Zheng Sun, Dingxin Xu, Hongye Huang, Zheng Li, Hanli Liu, Bangan Liu, Jian Pang, Teruki Someya, Atsushi Shirane, Kenichi Okada
IEICE Transactions on Electronics E103C ( 10 ) 505 - 513 2020.10
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Sub-Terahertz 300GHz Amplifier on CMOS for Ultra-High Data-Rate Wireless Communications
Korkut Kaan Tokgoz, Kenichi Okada
2020 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2020 202 - 204 2020.9
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300-GHz-Band 120-Gb/s Wireless Front-End Based on InP-HEMT PAs and Mixers
Hiroshi Hamada, Takuya Tsutsumi, Hideaki Matsuzaki, Takuya Fujimura, Ibrahim Abdo, Atsushi Shirane, Kenichi Okada, Go Itami, Ho Jin Song, Hiroki Sugiyama, Hideyuki Nosaka
IEEE Journal of Solid-State Circuits 55 ( 9 ) 2316 - 2335 2020.9
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A 300GHz wireless transceiver in 65nm CMOS for IEEE802.15.3d using push-push subharmonic mixer
Ibrahim Abdo, Takuya Fujimura, Tsuyoshi Miura, Korkut K. Tokgoz, Hiroshi Hamada, Hideyuki Nosaka, Atsushi Shirane, Kenichi Okada
IEEE MTT-S International Microwave Symposium Digest 2020-August 623 - 626 2020.8
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A CMOS Ka-Band SATCOM Transceiver with ACI-Cancellation Enhanced Dual-Channel Low-NF Wide-Dynamic-Range RX and High-Linearity TX
Yun Wang, Dongwon You, Xi Fu, Takeshi Nakamura, Ashbir Aviat Fadila, Teruki Someya, Atsuhiro Kawaguchi, Jian Pang, Kiyoshi Yanagisawa, Bangan Liu, Yuncheng Zhang, Haosheng Zhang, Rui Wu, Atsushi Shirane, Shunichiro Masaki, Daisuke Yamazaki, Kenichi Okada
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 2020-August 355 - 358 2020.8
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A 68-dB isolation 1.0-dB loss compact CMOS SPDT RF switch utilizing switched resonance network
Xi Fu, Yun Wang, Zheng Li, Atsushi Shirane, Kenichi Okada
IEEE MTT-S International Microwave Symposium Digest 2020-August 1315 - 1318 2020.8
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A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage Cancellation
Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Rui Wu, Yun Wang, Dongwon You, Bangan Liu, Zheng Sun, Yucheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
IEEE Symposium on VLSI Circuits, Digest of Technical Papers 2020-June 2020.6
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A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL
Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Kiyoshi Yanagisawa, Junjun Qiu, Yun Wang, Jian Pang, Atsushi Shirane, Kenichi Okada
IEEE Symposium on VLSI Circuits, Digest of Technical Papers 2020-June 2020.6
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A 39-GHz 64-Element Phased-Array Transceiver with Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS
Yun Wang, Rui Wu, Jian Pang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Xi Fu, Daiki Matsumoto, Takeshi Nakamura, Ryo Kubozoe, Masaru Kawabuchi, Bangan Liu, Haosheng Zhang, Junjun Qiu, Hanli Liu, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 55 ( 5 ) 1249 - 1269 2020.5
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Millimeter-Wave CMOS Phased-Array Transceiver Supporting Dual-Polarized MIMO for 5G NR
Kenichi Okada, Jian Pang
Proceedings of the Custom Integrated Circuits Conference 2020-March 2020.3
-
Fully synthesized digital PLL
Bangan Liu, Wei Deng, Kenichi Okada
Phase-Locked Frequency Generation and Clocking 231 - 266 2020.1
-
Ultra-low-power ADPLL
Hanli Liu, Kenichi Okada
Phase-Locked Frequency Generation and Clocking 267 - 293 2020.1
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A 28GHz CMOS Differential Bi-Directional Amplifier for 5G NR
Zheng Li, Jian Pang, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Joshua Alvin, Bangan Liu, Zheng Sun, Hongye Huang, Atsushi Shirane, Kenichi Okada
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 2020-January 5 - 6 2020.1
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A 28.16-Gb/s Area-Efficient 60-GHz CMOS Bidirectional Transceiver for IEEE 802.11ay
Jian Pang, Bangan Liu, Makihiko Katsuragi, Kento Kimura, Atsushi Shirane, Kenichi Okada, Korkut Kaan Tokgoz, Shotaro Maki, Zheng Li, Xueting Luo, Ibrahim Abdo, Seitaro Kawai, Hanli Liu, Zheng Sun
IEEE Transactions on Microwave Theory and Techniques 68 ( 1 ) 252 - 263 2020.1
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Total Ionizing Dose Effects on 28GHz CMOS Bi-Directional Transceiver for 5G Non-Terrestrial Networks
Atsuhiro Kawaguchi, Jian Pang, Zheng Li, Kiyoshi Yanagisawa, Atsushi Shirane, Kenichi Okada
2020 20th European Conference on Radiation and Its Effects on Components and Systems, RADECS 2020 - Proceedings 2020
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Teruki Someya, A. K. M. Mahfuzul Islam, Kenichi Okada
IEEE Solid-State Circuits Letters 3 458 - 461 2020
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Ultralow-power class-c complementary colpitts crystal oscillator
Xu, Z., Kimura, N., Okada, K., Miyahara, M.
IEEE Solid-State Circuits Letters 3 274 - 277 2020
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A Fully-Synthesizable Fractional-N Injection-Locked PLL for Digital Clocking with Triangle/Sawtooth Spread-Spectrum Modulation Capability in 5-nm CMOS
Bangan Liu, Zheng Li, Xi Fu, Atsushi Shirane, Hitoshi Kurosu, Yoshinori Nakane, Shunichiro Masaki, Kenichi Okada, Yuncheng Zhang, Junjun Qiu, Hongye Huang, Zheng Sun, Dingxin Xu, Haosheng Zhang, Yun Wang, Jian Pang
IEEE Solid-State Circuits Letters 3 34 - 37 2020
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A 28-GHz CMOS vector-summing phase shifter featuring I/Q imbalance calibration supporting 11.2Gb/s in 256QAM for 5G new radio
Jian Pang, Ryo Kubozoe, Zheng Li, Masaru Kawabuchi, Atsushi Shirane, Kenichi Okada
IEICE Transactions on Electronics E103C ( 2 ) 39 - 47 2020
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Jian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang 0008, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Bangan Liu, Aravind Tharayil Narayanan, Junjun Qiu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, Keiichi Motoi, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
IEEE J. Solid State Circuits 55 ( 9 ) 2371 - 2386 2020
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Millimeter-wave phased-array transceiver using CMOS technology
Kenichi Okada
Asia-Pacific Microwave Conference Proceedings, APMC 2019-December 729 - 731 2019.12
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Millimeter-wave InP Device Technologies for Ultra-high Speed Wireless Communications toward beyond 5G
H. Hamada, H. Nosaka, T. Tsutsumi, H. Sugiyama, H. Matsuzaki, H. J. Song, G. Itami, T. Fujimura, I. Abdo, K. Okada
Technical Digest - International Electron Devices Meeting, IEDM 2019-December 2019.12
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A 265-μW Fractional-N Digital PLL with Seamless Automatic Switching Sub-Sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65-nm CMOS
Hanli Liu, Atsushi Shirane, Kenichi Okada, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya
IEEE Journal of Solid-State Circuits 54 ( 12 ) 3478 - 3492 2019.12
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10GHz varactor-less VCO with helium-3 Ion irradiated inductor
Hans Herdian, Haosheng Zhang, Aravind Tharayil Narayanan, Atsushi Shirane, Kenichi Okada
Asia-Pacific Microwave Conference Proceedings, APMC 2019-December 63 - 65 2019.12
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300-GHz 120-Gb/s Wireless Transceiver with High-Output-Power and High-Gain Power Amplifier Based on 80-nm InP-HEMT Technology
Hiroshi Hamada, Takuya Tsutsumi, Go Itami, Hiroki Sugiyama, Hideaki Matsuzaki, Kenichi Okada, Hideyuki Nosaka
2019 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2019 2019.11
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An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment
Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto
Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019 267 - 270 2019.11
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ULPAC: A Miniaturized Ultralow-Power Atomic Clock
Haosheng Zhang, Hans Herdian, Aravind Tharayil Narayanan, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shigeyoshi Goka, Shinya Yanagimachi, Kenichi Okada
IEEE Journal of Solid-State Circuits 54 ( 11 ) 3135 - 3148 2019.11
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Millimeter-Wave CMOS Phased-Array Transceiver Toward 1Tbps Wireless Communication
Kenichi Okada
2019 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2019 2019-May 122 - 123 2019.11
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Electromagnetic simulation of CMOS on-chip spiral inductors in 5 GHz band
Takuichi Hirano, Ning Li, Kenichi Okada, Takeshi Inoue, Masatsugu Sogabe
2019 IEEE International Symposium on Antennas and Propagation and USNC-URSI Radio Science Meeting, APSURSI 2019 - Proceedings 1903 - 1904 2019.7
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A 39GHz 64-Element Phased-Array CMOS Transceiver with Built-in Calibration for Large-Array 5G NR
Yun Wang, Rui Wu, Jian Pang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Xi Fu, Daiki Matsumoto, Takeshi Nakamura, Ryo Kubozoe, Masaru Kawabuchi, Bangan Liu, Haosheng Zhang, Junjun Qiu, Hanli Liu, Wei Deng, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 2019-June 279 - 282 2019.6
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0.2mW 70Fs<inf>rms</inf>-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur
Haosheng Zhang, Aravind Tharayil Narayanan, Hans Herdian, Bangan Liu, Yun Wang, Atsushi Shirane, Kenichi Okada
IEEE Symposium on VLSI Circuits, Digest of Technical Papers 2019-June C38 - C39 2019.6
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A 28-GHz CMOS Phased-Array Transceiver Based on LO Phase-Shifting Architecture With Gain Invariant Phase Tuning for 5G New Radio
Jian Pang, Rui Wu, Yun Wang, Masato Dome, Hisashi Kato, Hongye Huang, Aravind Tharayil Narayanan, Hanli Liu, Bangan Liu, Takeshi Nakamura, Takuya Fujimura, Masaru Kawabuchi, Ryo Kubozoe, Tsuyoshi Miura, Daiki Matsumoto, Zheng Li, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 54 ( 5 ) 1228 - 1242 2019.5
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A 300GHz dielectric lens antenna
Ibrahim Abdo, Takuya Fujimura, Tsuyoshi Miura, Atsushi Shirane, Kenichi Okada
GSMM 2019 - 12th Global Symposium on Millimeter Waves, Proceeding 17 - 19 2019.5
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Jian Pang, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yuuki Seo, Masato Dome, Hisashi Kato, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Yuki Terashima, Hanli Liu, Teerachot Siriburanon, Aravind Tharayil Narayanan, Nurul Fajri, Tohru Kaneko, Toru Yoshioka, Bangan Liu, Yun Wang, Rui Wu, Ning Li, Korkut Kaan Tokgoz, Masaya Miyahara, Atsushi Shirane, Kenichi Okada
IEEE Journal of Solid-State Circuits 54 ( 5 ) 1375 - 1390 2019.5
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Bangan Liu, Yuncheng Zhang, Junjun Qiu, Wei Deng, Zule Xu, Haosheng Zhang, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada
Proceedings of the Custom Integrated Circuits Conference 2019-April 1 - 4 2019.4
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A power-efficient pulse-vco for chip-scale atomic clock
Haosheng Zhang, Aravind Tharayil Narayanan, Hans Herdian, Bangan Liu, Rui Wu, Atsushi Shirane, Kenichi Okada
IEICE Transactions on Electronics E102C ( 4 ) 276 - 286 2019.4
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Haosheng Zhang, Hans Herdian, Aravind Tharayil Narayanan, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shinya Yanagimachi, Kenichi Okada
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 2019-February 462 - 464 2019.3
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16.1 A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS
Hanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 2019-February 256 - 258 2019.3
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A -194 dBC/Hz FOM VCO with low-supply sensitivity for ultra-low-power atomic clock
Haosheng Zhang, Hans Herdian, Aravind Tharayil Narayanan, Bangan Liu, Rui Wu, Atsushi Shirane, Kenichi Okada
Asia-Pacific Microwave Conference Proceedings, APMC 2018-November 788 - 790 2019.1
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Type-I digital ring-based PLL using loop delay compensation and ADC-based sampling phase detector
Xu, Z., Firdauzi, A., Miyahara, M., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E102C ( 7 ) 520 - 529 2019
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A pulse-tail-feedback LC-VCO with 700 Hz flicker noise corner and −195 dBC Fom
Narayanan, A.T., Okada, K.
IEICE Transactions on Electronics E102C ( 7 ) 595 - 606 2019
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A 0.4-ps-Jitter -52-dBc-Spur Synthesizable Injection-Locked PLL with Self-Clocked Nonoverlap Update and Slope-Balanced Subsampling BBPD
Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang, Junjun Qiu, Toru Yoshioka, Jun Emmei, Jian Pang, Aravind Tharayil Narayanan, Haosheng Zhang, Dongsheng Yang, Hanli Liu, Teruki Someya, Atsushi Shirane, Kenichi Okada
IEEE Solid-State Circuits Letters 2 ( 1 ) 5 - 8 2019
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A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR.
Jian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang 0008, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Aravind Tharayil Narayanan, Bangan Liu, Junjun Qiu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, Keiichi Motoi, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada
IEEE International Solid- State Circuits Conference(ISSCC) 55 ( 9 ) 344 - 346 2019
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A 273-301-GHz Amplifier with 21-dB Peak Gain in 65-nm Standard Bulk CMOS
Tokgoz, K.K., Abdo, I., Fujimura, T., Pang, J., Kawano, Y., Iwai, T., Kasamatsu, A., Watanabe, I., Okada, K.
IEEE Microwave and Wireless Components Letters 29 ( 5 ) 342 - 344 2019
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Wang, Y., Liu, B., Wu, R., Liu, H., Narayanan, A.T., Pang, J., Li, N., Yoshioka, T., Terashima, Y., Zhang, H., Tang, D., Katsuragi, M., Lee, D., Choi, S., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 54 ( 5 ) 1363 - 1374 2019
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CMOS transceiver design for ultra-high-speed millimeter-wave wireless communications
Okada, K., Wu, R.
Millimeter-Wave Circuits for 5G and Radar 193 - 242 2019
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A 28GHz CMOS Phase Shifter Supporting 11.2Gb/s in 256QAM with an RMS Gain Error of 0.13dB for 5G Mobile Network
Jian Pang, Ryo Kubozoe, Zheng Li, Masaru Kawabuchi, Kenichi Okada
2018 48th European Microwave Conference, EuMC 2018 807 - 810 2018.11
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A Compact 39-GHz 17.2-dBm Power Amplifier for 5G Communication in 65-nm CMOS
Yun Wang, Rui Wu, Kenichi Okada
2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018 2018.11
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A 64μs Start-Up 26/40MHz Crystal Oscillator with Negative Resistance Boosting Technique Using Reconfigurable Multi-Stage Amplifier
Masaya Miyahara, Yukiya Endo, Kenichi Okada, Akira Matsuzawa
IEEE Symposium on VLSI Circuits, Digest of Technical Papers 2018-June 115 - 116 2018.10
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A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver
Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang, Tohru Kaneko, Rui Wu, Wei Deng, Kenichi Okada
ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference 310 - 313 2018.10
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300-GHz. 100-Gb/s InP-HEMT Wireless Transceiver Using a 300-GHz Fundamental Mixer
Hiroshi Hamada, Takuya Fujimura, Ibrahim Abdo, Kenichi Okada, Ho Jin Song, Hiroki Sugiyama, Hideaki Matsuzaki, Hideyuki Nosaka
IEEE MTT-S International Microwave Symposium Digest 2018-June 1480 - 1483 2018.8
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A 28GHz CMOS phased-array transceiver featuring gain invariance based on LO phase shifting architecture with 0.1-degree beam-steering resolution for 5G New Radio
Jian Pang, Rui Wu, Yun Wang, Masato Dome, Hisashi Kato, Hongye Huang, Aravind Tharayil Narayanan, Hanli Liu, Bangan Liu, Takeshi Nakamura, Takuya Fujimura, Masaru Kawabuchi, Ryo Kubozoe, Tsuyoshi Miura, Daiki Matsumoto, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Kenichi Okada
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 2018-June 56 - 59 2018.8
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A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique
Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang, Junjun Qiu, Torn Yoshioka, Jun Emmei, Haosheng Zhang, Jian Pang, Aravind Tharayil Narayanan, Dongsheng Yang, Hanli Liu, Kenichi Okada, Akira Matsuzawa
2018 IEEE Custom Integrated Circuits Conference, CICC 2018 1 - 4 2018.5
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A 120Gb/s 16QAM CMOS millimeter-wave wireless transceiver
Korkut K. Tokgoz, Shotaro Maki, Jian Pang, Noriaki Nagashima, Ibrahim Abdo, Seitaro Kawai, Takuya Fujimura, Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 61 168 - 170 2018.3
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An ADPLL-centric bluetooth low-energy transceiver with 2.3mW interference-tolerant hybrid-loop receiver and 2.9mW single-point polar transmitter in 65nm CMOS
Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko, Wei Deng, Rui Wu, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 61 444 - 446 2018.3
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A 0.98mW fractional-N ADPLL using 10b isolated constant-slope DTC with FOM of -246dB for IoT applications in 65nm CMOS
Hanli Liu, Dexian Tang, Zheng Sun, Wei Deng, Huy Cu Ngo, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 61 246 - 248 2018.3
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A Sub-mW Fractional-N ADPLL with FOM of -246 dB for IoT applications
Liu, H., Tang, D., Sun, Z., Deng, W., Ngo, H.C., Okada, K.
IEEE Journal of Solid-State Circuits 53 ( 12 ) 3540 - 3552 2018
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Radiation of a Semi-rigid Cable Monopole Antenna Inserting into a 60GHz-band Oscillator Chip
Yuta Saito, Takashi Tomura, Jiro Hirokawa, Kenichi Okada
2018 INTERNATIONAL SYMPOSIUM ON ANTENNAS AND PROPAGATION (ISAP) 118 ( 310(AP2018 101-144)(Web) ) 2018
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A 28.16-Gb/s Area-Efficient 60GHz CMOS Bi-Directional Transceiver for IEEE 802.11ay.
Jian Pang, Korkut Kaan Tokgoz, Shotaro Maki, Zheng Li, Xueting Luo, Ibrahim Abdo, Seitarou Kawai, Hanli Liu, Bangan Liu, Makihiko Katsuragi, Kento Kimura, Atsushi Shirane, Kenichi Okada
IEEE Asian Solid-State Circuits Conference(A-SSCC) 68 ( 1 ) 77 - 78 2018
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Liu, H., Sun, Z., Tang, D., Huang, H., Kaneko, T., Chen, Z., Deng, W., Wu, R., Okada, K.
IEEE Journal of Solid-State Circuits 53 ( 12 ) 3672 - 3687 2018
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Liu, B., Wang, Y., Pang, J., Zhang, H., Yang, D., Narayanan, A.T., Lee, D.Y., Choi, S.T., Wu, R., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E101C ( 2 ) 126 - 134 2018
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Liu, H., Siriburanon, T., Nakata, K., Deng, W., Son, J.H., Lee, D.Y., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E101C ( 4 ) 187 - 196 2018
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Design of low-loss 60 GHz integrated antenna switch in 65 nm CMOS
Tokgoz, K.K., Kawai, S., Okada, K., Matsuzawa, A.
IEICE Electronics Express 15 ( 7 ) 2018
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Special section on analog circuits and their application technologies
Okada, K.
IEICE Transactions on Electronics E101C ( 7 ) 430 - 431 2018
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Gain measurement of 60 GHz CMOS on-chip dipole antenna by proton irradiation
T. Hirano, N. Li, T. Inoue, H. Yagi, K. Okada, A. Matsuzawa
2017 International Symposium on Antennas and Propagation, ISAP 2017 2017-January 1 - 2 2017.12
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Comparison between L-2L and thru-reflect-line de-embedding methods for W-band CMOS amplifier design
Ibrahim Abdo, Korkut Kaan Tokgoz, Takuya Fujimura, Kenichi Okada, Akira Matsuzawa
2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 34 - 36 2017.9
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A 100-123GHz CMOS frequency doubler with 5.5dBm output power and high fundamental rejection
Ibrahim Abdo, Korkut Kaan Tokgoz, Takuya Fujimura, Kenichi Okada, Akira Matsuzawa
2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 138 - 140 2017.9
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A low-loss 60GHz integrated antenna switch in 65nm CMOS
Korkut Kaan Tokgoz, Seitaro Kawai, Kenichi Okada, Akira Matsuzawa
2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 50 - 52 2017.9
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A 100mW 3.0 Gb/s spectrum efficient 60 GHz Bi-Phase OOK CMOS transceiver
Yun Wang, Bangan Liu, Hanli Liu, Aravind Tharayil Narayanan, Jian Pang, Ning Li, Torn Yoshioka, Yuki Terashima, Haosheng Zhang, Dexian Tang, Makihiko Katsuragi, Daeyoung Lee, Sungtae Choi, Rui Wu, Kenichi Okada, Akira Matsuzawa
IEEE Symposium on VLSI Circuits, Digest of Technical Papers C298 - C299 2017.8
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A pulse-tail-feedback VCO achieving FoM of 195dBc/Hz with flicker noise corner of 700Hz
Aravind Tharayil Narayanan, Ning Li, Kenichi Okada, Akira Matsuzawa
IEEE Symposium on VLSI Circuits, Digest of Technical Papers C124 - C125 2017.8
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Ultra-high-data-rate 60-GHz CMOS transceiver for future radio access network
Rui Wu, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Kento Kimura, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Korkut Kaan Tokgoz, Teerachot Siriburanon, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
Proceedings of International Conference on ASIC 2017-October 1025 - 1028 2017.7
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A pulse VCO with tail filter
Haosheng Zhang, Aravind Tharayil Narayanan, Bangan Liu, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 942 - 945 2017.6
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A 0.42ps-jitter -241.7dB-FOM synthesizable injection-locked PLL with noise-isolation LDO
Huy Cu Ngo, Kengo Nakata, Toru Yoshioka, Yuki Terashima, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 60 150 - 151 2017.3
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A 128-QAM 60GHz CMOS transceiver for IEEE802.11ay with calibration of LO feedthrough and I/Q imbalance
Jian Pang, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yuuki Seo, Masato Dome, Hisashi Kato, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Yuki Terashima, Hanli Liu, Teerachot Siriburanon, Aravind Tharayil Narayanan, Nurul Fajri, Tohru Kaneko, Toru Yoshioka, Bangan Liu, Yun Wang, Rui Wu, Ning Li, Korkut Kaan Tokgoz, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 60 424 - 425 2017.3
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W-band ultra-high data-rate 65nm CMOS wireless transceiver
Korkut Kaan Tokgoz, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 5 - 6 2017.2
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An HDL-synthesized injection-locked PLL using LC-Based DCO for On-chip clock generation
Dongsheng Yang, Wei Deng, Bangan Liu, Aravind Tharayil Narayanan, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 13 - 14 2017.2
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An LO-buffer-less 60-GHz CMOS transmitter with oscillator pulling mitigation
Rui Wu, Jian Pang, Yuuki Seo, Kento Kimura, Seitaro Kawai, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings 109 - 112 2017.2
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64-QAM 60-GHz CMOS Transceivers for IEEE 802.11ad/ay
Wu, R., Minami, R., Tsukui, Y., Kawai, S., Seo, Y., Sato, S., Kimura, K., Kondo, S., Ueno, T., Fajri, N., Maki, S., Nagashima, N., Takeuchi, Y., Yamaguchi, T., Musa, A., Tokgoz, K.K., Siriburanon, T., Liu, B., Wang, Y., Pang, J., Li, N., Miyahara, M., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 52 ( 11 ) 2871 - 2891 2017
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A fully-synthesizable 10.06Gbps 16.1mW injection-locked CDR in 28nm FDSOI
Narayanan, A.T., Deng, W., Yang, D., Wu, R., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E100C ( 3 ) 259 - 267 2017
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Analysis of effective material properties of metal dummy fills in a CMOS chip
Hirano, T., Li, N., Okada, K.
IEICE Transactions on Communications E100B ( 5 ) 793 - 798 2017
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Wang, Y., Katsuragi, M., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E100C ( 6 ) 568 - 575 2017
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A -194.0dBc/Hz FoM CMOS tail-filtering VCO using Helium-3 ion irradiation technique
Hanli Liu, Ning Li, Aravind Tharayil Narayanan, Teerachot Siriburanon, Takuichi Hirano, Kenichi Okada, Akira Matsuzawa, Takeshi Inoue, Hitoshi Sakane
EuMIC 2016 - 11th European Microwave Integrated Circuits Conference 213 - 216 2016.12
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An LC-DCO based synthesizable injection-locked PLL with an FoM of -250.3dB
Dongsheng Yang, Wei Deng, Bangan Liu, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa
European Solid-State Circuits Conference 2016-October 197 - 200 2016.10
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A 2 GHz 3.1 mW type-I digital ring-based PLL
Zule Xu, Anugerah Firdauzi, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
European Solid-State Circuits Conference 2016-October 205 - 208 2016.10
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[依頼講演］ミリ波を用いる5Gセルラネットワークを実現するために Reviewed
タン ザカン, 阪口 啓, 荒木純道, 安藤 真, 廣川二郎, 府川和彦, 張 裕淵, 高田潤一, 齋藤健太郎, 松澤 昭, 岡田健一, 宮原正也
信学技法 Vol. 2016.10
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A 28-Gb/s 60-GHz wireless transceiver in 65nm CMOS with 64QAM capability
Kenichi Okada
Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015 2016.7
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An automatic place-and-routed two-stage fractional-N injection-locked PLL using soft injection
Dongsheng Yang, Wei Deng, Aravind Tharayil Narayanan, Kengo Nakata, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 25-28-January-2016 1 - 2 2016.3
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Design of 60 GHz CMOS on-chip dipole antenna with 50 % radiation efficiency by helium-3 ion irradiation
Takuichi Hirano, Ning Li, Kenichi Okada, Akira Matsuzawa, Jiro Hirokawa, Makoto Ando, Takeshi Inoue, Hitoshi Sakane
Proceeding - 2015 IEEE International Conference on Antenna Measurements and Applications, IEEE CAMA 2015 2016.3
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A noise reduction technique for divider-less fractional-N frequency synthesizer using phase-interpolation technique
Aravind Tharayil Narayanan, Makihiko Katsuragi, Kengo Nakata, Yuki Terashima, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 25-28-January-2016 5 - 6 2016.3
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A 42Gb/s 60GHz CMOS transceiver for IEEE 802.11ay
Rui Wu, Seitaro Kawai, Yuuki Seo, Nurul Fajri, Kento Kimura, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Teerachot Siriburanon, Shoutarou Maki, Bangan Liu, Yun Wang, Noriaki Nagashima, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 59 248 - 249 2016.2
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A 56Gb/s W-band CMOS wireless transceiver
Korkut K. Tokgoz, Shotaro Maki, Seitaro Kawai, Noriaki Nagashima, Jun Emmei, Masato Dome, Hisashi Kato, Jian Pang, Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai, Yuuki Seo, Kimsrun Lim, Shinji Sato, Li Ning, Kengo Nakata, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 59 242 - 243 2016.2
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Characterization of cross-line up to 110 GHz using two-port measurements
Korkut Kaan Tokgoz, Shotaro Maki, Kenichi Okada, Akira Matsuzawa
2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings 97 - 99 2016.1
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A 60GHz CMOS transceiver considering HCI reliability
Kenichi Okada
2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings 22 - 24 2016.1
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Sugawara, M., Mori, K., Xu, Z., Miyahara, M., Okada, K., Matsuzawa, A.
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E99A ( 12 ) 2435 - 2443 2016
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A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator with an FoM of -250 dB
Narayanan, A.T., Katsuragi, M., Kimura, K., Kondo, S., Tokgoz, K.K., Nakata, K., Deng, W., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 51 ( 7 ) 1630 - 1640 2016
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A 0.0055 mm2 480 μW fully synthesizable PLL using stochastic TDC in 28 nm FDSOI
Yang, D., Ueno, T., Deng, W., Terashima, Y., Nakata, K., Narayanan, A.T., Wu, R., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E99C ( 6 ) 632 - 640 2016
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A 2.2 GHz-242 dB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture
Siriburanon, T., Kondo, S., Kimura, K., Ueno, T., Kawashima, S., Kaneko, T., Deng, W., Miyahara, M., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 51 ( 6 ) 1385 - 1397 2016
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A 3.6 GHz Low-Noise Fractional-N Digital PLL Using SAR-ADC-Based TDC
Xu, Z., Miyahara, M., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 51 ( 10 ) 2345 - 2356 2016
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Accurate Transistor Modeling by Three-Parameter Pad Model for Millimeter-Wave CMOS Circuit Design
Kawai, S., Sato, S., Maki, S., Tokgoz, K.K., Okada, K., Matsuzawa, A.
IEEE Transactions on Microwave Theory and Techniques 64 ( 6 ) 1736 - 1744 2016
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Siriburanon, T., Kondo, S., Katsuragi, M., Liu, H., Kimura, K., Deng, W., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 51 ( 5 ) 1246 - 1260 2016
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Present and future perspectives on analog circuit design
Okada, K.
Journal of the Institute of Electronics, Information and Communication Engineers 99 ( 9 ) 895 - 900 2016
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Substrate noise isolation improvement by helium-3 ion irradiation technique in a triple-well CMOS process
Ning Li, Takeshi Inoue, Takuichi Hirano, Jian Pang, Rui Wu, Kenichi Okada, Hitoshi Sakane, Akira Matsuzawa
European Solid-State Device Research Conference 2015-November 254 - 257 2015.11
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A 28-GHz fractional-N frequency synthesizer with reference and frequency doublers for 5G cellular
Teerachot Siriburanon, Hanli Liu, Kengo Nakata, Wei Deng, Ju Ho Son, Dae Young Lee, Kenichi Okada, Akira Matsuzawa
European Solid-State Circuits Conference 2015-October 76 - 79 2015.10
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[依頼講演］5Gに対する東京工業大学の取組み 〜 ミリ波ヘテロジニアスネットワークを実現するために 〜 Reviewed
阪口 啓, タン ザカン, 荒木純道, 安藤 真, 廣川二郎, 府川和彦, 張 裕淵, 高田潤一, 齋藤健太郎, 松澤 昭, 岡田健一, 宮原正也
信学技法 Vol. 2015.10
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A 20GHz Class-C VCO using noise sensitivity mitigation technique
Kento Kimura, Kenichi Okada, Akira Matsuzawa
2015 IEEE 15th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2015 80 - 82 2015.6
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Cross-line characterization for capacitive cross coupling in differential millimeter-wave CMOS amplifiers
Korkut Kaan Tokgoz, Kimsrun Lim, Yuuki Seo, Seitarou Kawai, Kenichi Okada, Akira Matsuzawa
2015 IEEE 15th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2015 46 - 48 2015.6
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L-2L de-embedding method with double-T-type PAD model for millimeter-wave amplifier design
Seitaro Kawai, Korkut Kaan Tokgoz, Kenichi Okada, Akira Matsuzawa
2015 IEEE 15th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2015 43 - 45 2015.6
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An HCI-healing 60GHz CMOS transceiver
Rui Wu, Seitaro Kawai, Yuuki Seo, Kento Kimura, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 58 350 - 351 2015.3
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A 0.048mm2 3mW synthesizable fractional-N PLL with a soft injection-locking technique
Wei Deng, Dongsheng Yang, Aravind Tharayil Narayanan, Kengo Nakata, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 58 252 - 253 2015.3
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A tail-current modulated VCO with adaptive-bias scheme
Aravind Tharayil Narayanan, Wei Deng, Kenichi Okada, Akira Matsuzawa
20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 36 - 37 2015.3
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An HDL-synthesized gated-edge-injection PLL with a current output DAC
Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa
20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 2 - 3 2015.3
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A 58.3-to-65.4 GHz 34.2 mW sub-harmonically injection-locked PLL with a sub-sampling phase detection
Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, Akira Matsuzawa
20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 42 - 43 2015.3
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A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs
Rui Wu, Qinghong Bu, Wei Deng, Kenichi Okada, Akira Matsuzawa
2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers 181 - 184 2015.1
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A 0.011 mm2 PVT-robust fully-synthesizable CDR with a data rate of 10.05 Gb/s in 28nm FD SOI
Aravind Tharayil Narayanan, Wei Deng, Dongsheng Yang, Rui Wu, Kenichi Okada, Akira Matsuzawa
2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers 285 - 288 2015.1
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Wu, R., Deng, W., Sato, S., Hirano, T., Li, N., Inoue, T., Sakane, H., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E98C ( 4 ) 304 - 314 2015
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Li, N., Okada, K., Inoue, T., Hirano, T., Bu, Q., Narayanan, A.T., Siriburanon, T., Sakane, H., Matsuzawa, A.
IEEE Transactions on Electron Devices 62 ( 4 ) 1269 - 1275 2015
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Low-phase noise quadrature frequency synthesizer for 60 GHz radios
Deng, W., Siriburanon, T., Musa, A., Okada, K., Matsuzawa, A.
Wireless Transceiver Circuits: System Perspectives and Design Aspects 491 - 514 2015
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Takamiya, M., Wu, J.-T., Ryyn{\"a}nen, J., Okada, K., Kim, J.
IEEE Journal of Solid-State Circuits 50 ( 12 ) 2799 - 2803 2015
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Introduction to the special issue on the 40th European Solid-State Circuits Conference (ESSCIRC)
Nagari, A., Okada, K., Verhelst, M.
IEEE Journal of Solid-State Circuits 50 ( 7 ) 1512 - 1515 2015
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An AM-PM noise mitigation technique in Class-C VCO
Kimura, K., Narayanan, A.T., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E98C ( 12 ) 1161 - 1170 2015
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Siriburanon, T., Deng, W., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E98C ( 6 ) 471 - 479 2015
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Deng, W., Yang, D., Ueno, T., Siriburanon, T., Kondo, S., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 50 ( 1 ) 68 - 80 2015
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A fully synthesizable injection-locked PLL with feedback current output DAC in 28nm FDSOI
Yang, D., Deng, W., Narayanan, A.T., Wu, R., Liu, B., Okada, K., Matsuzawa, A.
IEICE Electronics Express 12 ( 15 ) 2015
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Digitally assisted analog and RF circuits
Okada, K.
IEICE Transactions on Electronics E98C ( 6 ) 461 - 470 2015
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Quadrature Oscillator Connection and Differential Feed of a Patch Antenna on the Thick Resin in a 60GHz band Silicon Chip Reviewed
Jiro Hirokawa, Naoya Oikawa, Yasutake Hirachi, Kenichi Okada, Makoto Ando
2015 INTERNATIONAL WORKSHOP ON ANTENNA TECHNOLOGY (IWAT) 247 - 248 2015
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Tokgoz, K.K., Lim, K., Kawai, S., Fajri, N., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E98C ( 1 ) 35 - 44 2015
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A tail-feedback VCO with self-adjusting current modulation scheme
Aravind Tharayil Narayanan, Wei Deng, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2014: Connecting the Future, EuMW 2014 - Conference Proceedings; EuMC 2014: 44th European Microwave Conference 707 - 710 2014.12
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A 60-GHz efficiency-enhanced on-chip dipole antenna using helium-3 ion implantation process
Rui Wu, Wei Deng, Shinji Sato, Takuichi Hirano, Ning Li, Takeshi Inoue, Hitoshi Sakane, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2014: Connecting the Future, EuMW 2014 - Conference Proceedings; EuMC 2014: 44th European Microwave Conference 108 - 111 2014.12
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A pulse-driven LC-VCO with a figure-of-merit of -192dBc/Hz
Aravind Tharayil Narayanan, Kento Kimura, Wei Deng, Kenichi Okada, Akira Matsuzawa
European Solid-State Circuits Conference 343 - 346 2014.10
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A millimeter-wave CMOS transceiver toward more than 300Gbps
Kenichi Okada
2014 Asia-Pacific Microwave Conference Proceedings, APMC 2014 1127 - 1129 2014.3
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60-GHz sub-sampling PLL using a dual-step-mixing ILFD
Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, Akira Matsuzawa
2014 Asia-Pacific Microwave Conference Proceedings, APMC 2014 708 - 710 2014.3
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Shunt characterization technique of decoupling transmission line for millimeter-wave CMOS amplifier design
Korkut Kaan Tokgoz, Kimsrun Lim, Kenichi Okada, Akira Matsuzawa
2014 Asia-Pacific Microwave Conference Proceedings, APMC 2014 274 - 276 2014.3
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A 17-mW 5-Gb/s 60-GHz CMOS transmitter with efficiency-enhanced on-chip antenna
Rui Wu, Wei Deng, Shinji Sato, Takuichi Hirano, Ning Li, Takeshi Inoue, Hitoshi Sakane, Kenichi Okada, Akira Matsuzawa
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 381 - 384 2014
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Coaxial-line Connection of a Circularly-polarized Patch Array Antenna on the Thick Resin and a 60 GHz-band Quadrature Oscillator Chip Reviewed
Naoya Oikawa, Jiro Hirokawa, Hiroshi Nakano, Yasutake Hirachi, Kenichi Okada, Makoto Ando
2014 IEEE INTERNATIONAL WORKSHOP ON ELECTROMAGNETICS (IEEE IWEM): APPLICATIONS AND STUDENT INNOVATION COMPETITION 169 - 170 2014
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A compact, low-power and low-jitter dual-loop injection locked pll using all-digital pvt calibration
Musa, A., Deng, W., Siriburanon, T., Miyahara, M., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 49 ( 1 ) 50 - 60 2014
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A variable-supply-voltage 60-GHz PA with consideration of HCI issues for TDD operation
Wu, R., Tsukui, Y., Minami, R., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E97-C ( 8 ) 803 - 812 2014
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A swing-enhanced current-reuse class-C VCO with dynamic bias control circuits
Teerachot Siriburanon, Wei Deng, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 25 - 26 2014
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15.1 A 0.0066mm2 780μW fully synthesizable PLL with a current-output DAC and an interpolative phase-coupled oscillator using edge-injection technique
Wei Deng, Dongsheng Yang, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 57 266 - 267 2014
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A 60-GHz sub-sampling frequency synthesizer using sub-harmonic injection-locked quadrature oscillators
Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, Akira Matsuzawa
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 105 - 108 2014
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A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generation
Wei Deng, Ahmed Musa, Teerachot Siriburanon, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 21 - 22 2014
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Deng, W., Hara, S., Musa, A., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 49 ( 9 ) 1984 - 1994 2014
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20.3 A 64-QAM 60GHz CMOS transceiver with 4-channel bonding
Kenichi Okada, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Rui Wu, Masaya Miyahara, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 57 346 - 347 2014
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Foreword: Special section on VLSI design and CAD algorithms
Yamada, A., Higami, Y., Takagi, K., Amagasaki, M., Ikeda, M., Ishihara, T., Ito, K., Usami, K., Okada, K., Kajihara, S., Kaneko, M., Kawaguchi, H., Kimura, S., Kurokawa, A., Shibata, Y., Seto, K., Song, T., Takashima, Y., Takahashi, A., Takenaka, T., Togawa, N., Tomiyama, H., Nakatake, S., Nakamura, Y., Hashimoto, M., Hamaguchi, K., Higuchi, H., Hirose, T., Fukuda, D., Matsumoto, T., Miura, Y., Minato, S.-I., Minami, F., Yamashita, S., Yuminaka, Y., Yoshikawa, M., Watanabe, T.
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E97A ( 12 ) 2366 - 2366 2014
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A 2.2GS/s 7b 27.4mW time-based folding-flash ADC with resistively averaged voltage-to-time amplifiers
Masaya Miyahara, Ibuki Mano, Masaaki Nakayama, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 57 388 - 389 2014
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A study of stability and phase noise of tail capacitive-feedback VCOs
Musa, A., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E96-C ( 4 ) 577 - 585 2013
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60 GHz On-Chip Loop Antenna Integrated in a 0.18 mu m CMOS Technology
Yuki Yao, Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando
2013 PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON ANTENNAS AND PROPAGATION (ISAP), VOLS 1 AND 2 2 927 - 929 2013
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A 60 GHz 3-dB tandem coupler using offset broadside-coupled lines on a silicon substrate Reviewed
Hamid Kiumarsi, Hiroyuki Ito, Kenichi Okada, Yusuke Uemichi, Yasuto Chiba, Noboru Ishihara, Kazuya Masu
IEICE ELECTRONICS EXPRESS 10 ( 2 ) 2013
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Evaluation of Effective Permittivity and Permeability for Dummy Metal Fills in a CMOS Chip Using Capacitor and Inductor Model Reviewed
Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando
PROCEEDINGS OF 2013 URSI INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC THEORY (EMTS) 695 - 697 2013
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Approximate Evaluation of Effective Permittivity for Metal Dummies in a CMOS Chip Using Electrostatic Capacitor Model Reviewed
Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando
2013 7TH EUROPEAN CONFERENCE ON ANTENNAS AND PROPAGATION (EUCAP) 1218 - 1220 2013
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Deng, W., Siriburanon, T., Musa, A., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 48 ( 7 ) 1710 - 1720 2013
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Siriburanon, T., Sato, T., Musa, A., Deng, W., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E96-C ( 6 ) 804 - 812 2013
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Musa, A., Okada, K., Matsuzawa, A.
IEEE Transactions on Microwave Theory and Techniques 61 ( 3 ) 1161 - 1173 2013
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Hirano, T., Okada, K., Hirokawa, J., Ando, M.
Applied Physics Letters 103 ( 12 ) 2013
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Class-C VCO with amplitude feedback loop for robust start-up and enhanced oscillation swing
Deng, W., Okada, K., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 48 ( 2 ) 429 - 440 2013
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A constant-current-controlled class-C VCO using a self-adjusting replica biasing scheme
Teerachot Siriburanon, Wei Deng, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference 109 - 112 2013
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A 13.2% locking-range divide-by-6, 3.1mW, ILFD using even-harmonic-enhanced direct injection technique for millimeter-wave PLLs
Teerachot Siriburanon, Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa
European Solid-State Circuits Conference 403 - 406 2013
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Okada, K., Kondou, K., Miyahara, M., Shinagawa, M., Asada, H., Minami, R., Yamaguchi, T., Musa, A., Tsukui, Y., Asakura, Y., Tamonoki, S., Yamagishi, H., Hino, Y., Sato, T., Sakaguchi, H., Shimasaki, N., Ito, T., Takeuchi, Y., Li, N., Bu, Q., Murakami, R., Bunsen, K., Matsushita, K., Noda, M., Matsuzawa, A.
IEEE Journal of Solid-State Circuits 48 ( 1 ) 46 - 65 2013
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A 60-GHz CMOS direct-conversion transmitter with injection-locking I/Q calibration
Satoshi Kondo, Tatsuya Yamaguchi, Yuuki Tsukui, Ryo Minami, Yasuaki Takeuchi, Ahmed Musa, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMIC 2013: 8th European Microwave Integrated Circuits Conference 300 - 303 2013
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Challenges toward millimeter-wave CMOS circuits enhanced by design techniques
Kenichi Okada
Technical Digest - International Electron Devices Meeting, IEDM 2013
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A fractional-N harmonic injection-locked frequency synthesizer with 10MHz-6.6GHz quadrature outputs for software-defined radios
Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 99 - 100 2013
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A 60 GHz up-conversion mixer using asymmetric layout with -41.1 dBc LO leakage
Yuki Tsukui, Kenichi Okada, Akira Matsuzawa
2013 IEEE 4th Latin American Symposium on Circuits and Systems, LASCAS 2013 - Conference Proceedings 2013
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A full 4-channel 60 GHz direct-conversion transceiver
Seitaro Kawai, Ryo Minami, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Yuki Tsukui, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 95 - 96 2013
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A sub-harmonic injection-locked frequency synthesizer with frequency calibration scheme for use in 60GHz TDD transceivers
Teerachot Siriburanon, Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 97 - 98 2013
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A digitally-calibrated 20-Gb/s 60-GHz direct-conversion transceiver in 65-nm CMOS
Seitaro Kawai, Ryo Minami, Yuki Tsukui, Yasuaki Takeuchi, Hiroki Asada, Ahmed Musa, Rui Murakami, Takahiro Sato, Qinghong Bu, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 137 - 140 2013
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A current-reuse Class-C LC-VCO with an adaptive bias scheme
Teerachot Siriburanon, Wei Deng, Kenichi Okada, Akira Matsuzawa
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 35 - 38 2013
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A 0.022mm2 970μW dual-loop injection-locked PLL with -243dB FOM using synthesizable all-digital PVT calibration circuits
Wei Deng, Ahmed Musa, Teerachot Siriburanon, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 56 248 - 249 2013
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A progressive mixing 20GHz ILFD with wide locking range for higher division ratios
Ahmed Musa, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 559 - 560 2012
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Two-stage band-selectable CMOS power amplifiers using inter-stage frequency tuning
Hong, J.Y., Imanishi, D., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E95-C ( 2 ) 290 - 297 2012
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60 GHz On-Chip Dipole Antenna with Differential Feed Reviewed
Takuichi Hirano, Tatsuya Yamaguchi, Ning Li, Kenichi Okada, Jiro Hirokawa, Makoto Ando
2012 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC 2012) 304 - 306 2012
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Clock/frequency generation circuits and systems
Rhee, W., Liscidini, A., Sim, J.-Y., Okada, K., Pamarti, S.
Journal of Electrical and Computer Engineering 2012
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Deng, W., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E95-C ( 7 ) 1285 - 1296 2012
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Electromagnetic Analysis of Effective Anisotropic Material Parameters for Metal Dummies in a CMOS chip Reviewed
Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando
2012 IEEE ANTENNAS AND PROPAGATION SOCIETY INTERNATIONAL SYMPOSIUM (APSURSI) 2012
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Electromagnetic Analysis of an On-Chip Spiral Inductor in the Millimeter-Wave Band Reviewed
Takashi Sumida, Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando
2012 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC 2012) 1277 - 1279 2012
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A 24 dB gain 51-68 GHz common source low noise amplifier using asymmetric-layout transistors
Li, N., Bunsen, K., Takayama, N., Bu, Q., Suzuki, T., Sato, M., Kawano, Y., Hirose, T., Okada, K., Matsuzawa, A.
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E95-A ( 2 ) 498 - 503 2012
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Bu, Q., Li, N., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E95-C ( 5 ) 942 - 948 2012
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Inter-stage tunable notch filter for a multi-band WCDMA receiver
Ito, T., Kanemaru, M., Furuya, S., Ta Ngoc Huy, D., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E95-C ( 11 ) 1776 - 1782 2012
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A 3-dB quadrature WLP coupler for 60 GHz applications
Hamid Kiumarsi, Hiroyuki Ito, Noboru Ishihara, Kenichi Okada, Yusuke Uemichi, Yasuto Chiba, Kazuya Masu
Materials Research Society Symposium Proceedings 1427 8 - 13 2012
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A 0.7 V-to-1.0V 10.1 dBm-to-13.2 dBm 60-GHz power amplifier using digitally-assisted LDO considering HCI issues
Rui Wu, Yuuki Tsukui, Ryo Minami, Kenichi Okada, Akira Matsuzawa
Proceedings - 2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 269 - 272 2012
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A 60GHz power amplifier using high common-mode rejection technique
Ryo Minami, Keigo Bunsen, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 10 - 12 2012
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A dual-conduction class-C VCO for a low supply voltage
Okada, K., Nomiyama, Y., Murakami, R., Matsuzawa, A.
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E95-A ( 2 ) 506 - 514 2012
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A wideband common-gate low-noise amplifier using capacitive feedback
Ito, T., Okada, K., Matsuzawa, A.
IEICE Transactions on Electronics E95-C ( 10 ) 1666 - 1674 2012
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A 58.1-to-65.0GHz frequency synthesizer with background calibration for millimeter-wave TDD transceivers
Wei Deng, Teerachot Siriburanon, Ahmed Musa, Kenichi Okada, Akira Matsuzawa
European Solid-State Circuits Conference 201 - 204 2012
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60-GHz CMOS direct-conversion transceiver using injection-lock oscillators
Kenichi Okada
Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC 2012
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A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry
Kenichi Okada, Keitarou Kondou, Masaya Miyahara, Masashi Shinagawa, Hiroki Asada, Ryo Minami, Tatsuya Yamaguchi, Ahmed Musa, Yuuki Tsukui, Yasuo Asakura, Shinya Tamonoki, Hiroyuki Yamagishi, Yasufumi Hino, Takahiro Sato, Hironori Sakaguchi, Naoki Shimasaki, Toshihiko Ito, Yasuaki Takeuchi, Ning Li, Qinghong Bu, Rui Murakami, Keigo Bunsen, Kota Matsushita, Makoto Noda, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 55 218 - 219 2012
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A 20 GHz push-push voltage-controlled oscillator for a 60 GHz frequency synthesizer
Teerachot Siriburanon, Takahiro Sato, Ahmed Musa, Wei Deng, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 205 - 207 2012
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A PVT-robust feedback class-C VCO using an oscillation swing enhancement technique
Wei Deng, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 563 - 564 2012
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A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS
Ryo Minami, Hiroki Asada, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Win Chiavipas, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 467 - 468 2012
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A 60-GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE802.15.3c
Kenichi Okada, Ning Li, Kota Matsushita, Keigo Bunsen, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Shogo Ito, Win Chaivipas, Ryo Minami, Tatsuya Yamaguchi, Yasuaki Takeuchi, Hiroyuki Yamagishi, Makoto Noda, Akira Matsuzawa
IEEE Journal of Solid-State Circuits 46 ( 12 ) 2988 - 3004 2011.12
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Topology and design considerations of 60 GHz CMOS LNAs for noise performance improving
Ning Li, Qinghong Bu, Kota Matsushita, Naoki Takayama, Shogo Ito, Kenichi Okada, Akira Matsuzawa
IEICE Transactions on Electronics E94-C ( 12 ) 1881 - 1888 2011.12
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A low phase noise quadrature injection locked frequency synthesizer for MM-wave applications
Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa
IEEE Journal of Solid-State Circuits 46 ( 11 ) 2635 - 2649 2011.11
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Tunable CMOS power amplifiers for reconfigurable transceivers
Jeeyoung Hong, Daisuke Imnaishi, Kenichi Okada, Akira Matsuzawa
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E94-A ( 11 ) 2394 - 2401 2011.11
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C-12-41 Area Reduction of Millimeter-Wave CMOS Amplifier Using Narrow Transmission Line
Tsukui Yuki, Asada Hiroki, Han Changyo, Okada Kenichi, Matsuzawa Akira
Proceedings of the Society Conference of IEICE 2011 ( 2 ) 116 - 116 2011.8
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Eigenmode Analysis of Propagation Constant for a Microstrip Line with Dummy Fills on a Si CMOS Substrate Reviewed
Yuya Ono, Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando
IEICE TRANSACTIONS ON ELECTRONICS E94C ( 6 ) 1008 - 1015 2011.6
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Measurement of integrated PA-to-LNA isolation on si CMOS chip
Ryo Minami, Jeeyoung Hong, Kenichi Okada, Akira Matsuzawa
IEICE Transactions on Electronics E94-C ( 6 ) 1057 - 1060 2011.6
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An ultra-compact LC-VCO using a stacked-spiral inductor
Rui Murakami, Toshihiko Ito, Kenichi Okada, Akira Matsuzawa
IEICE Electronics Express 8 ( 7 ) 512 - 517 2011.4
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A low-noise and highly-linear transmitter with envelope injection pre-power amplifier for multi-mode radio
Shouhei Kousai, Daisuke Miyashita, Junji Wadatsumi, Rui Ito, Takahiro Sekiguchi, Mototsugu Hamada, Kenichi Okada
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E94-A ( 2 ) 592 - 602 2011.2
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A new figure of Merit of LC oscilators considering frequency tuning range
Takahiro Sato, Kenichi Okada, Akira Matsuzawa
Proceedings of International Conference on ASIC 586 - 589 2011
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A 60GHz 16Gb/s 16QAM low-power direct-conversion transceiver using capacitive cross-coupling neutralization in 65 nm CMOS
Hiroki Asada, Keigo Bunsen, Kota Matsushita, Rui Murakami, Qinghong Bu, Ahmed Musa, Takahiro Sato, Tatsuya Yamaguchi, Ryo Minami, Toshihiko Ito, Kenichi Okada, Akira Matsuzawa
2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 373 - 376 2011
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A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver
Kenichi Okada
Proceedings of International Conference on ASIC 1022 - 1025 2011
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Effect of transmission line modeling using different de-embedding methods Reviewed
Ryo Minami, Changyo Han, Kota Matsushita, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2011: "Wave to the Future", EuMW 2011, Conference Proceedings - 41st European Microwave Conference, EuMC 2011 381 - 384 2011
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Area reduction of millimeter-wave CMOS amplifier using narrow transmission line Reviewed
Yuki Tsukui, Hiroki Asada, Changyo Han, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 797 - 800 2011
-
A feedback class-C VCO with robust startup condition over PVT variations and enhanced oscillation swing
Wei Deng, Kenichi Okada, Akira Matsuzawa
European Solid-State Circuits Conference 499 - 502 2011
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A tunable wideband frequency synthesizer using LC-VCO and mixer for reconfigurable radio transceivers Reviewed
Yusaku Ito, Kenichi Okada, Kazuya Masu
Journal of Electrical and Computer Engineering 2011
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A 58-63.6GHz quadrature PLL frequency synthesizer using dual-injection technique
Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 101 - 102 2011
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A 14.3% PAE parallel class-A and AB 60GHz CMOS PA
Ning Li, Kota Matsushita, Kenichi Okada, Akira Matsuzawa
IEICE Electronics Express 8 ( 13 ) 1071 - 1074 2011
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Low-loss and compact millimeter-wave balun on Si
Yusuke Uemichi, Hideki Hatakeyama, Takuya Aizawa, Kenichi Okada, Hamid Kiumarsi, Satoru Tanoi, Noboru Ishihara, Kazuya Masu
IEEE MTT-S International Microwave Symposium Digest 2011
-
A 60GHz CMOS power amplifier using capacitive cross-coupling neutralization with 16 % PAE
Hiroki Asada, Kota Matsushita, Keigo Bunsen, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2011: "Wave to the Future", EuMW 2011, Conference Proceedings - 41st European Microwave Conference, EuMC 2011 1115 - 1118 2011
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A 20GHz ILFD with locking range of 31% for divide-by-4 and 15% for divide-by-8 using progressive mixing
Ahmed Musa, Kenichi Okada, Akira Matsuzawa
2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 85 - 88 2011
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Multi-standard CMOS frequency synthesizers for cognitive radios
Kenichi Okada
Midwest Symposium on Circuits and Systems 2011
-
An improved dual-conduction class-C VCO using a tail resistor
Yasuaki Takeuchi, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2011: "Wave to the Future", EuMW 2011, Conference Proceedings - 6th European Microwave Integrated Circuit Conference, EuMIC 2011 204 - 207 2011
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A wideband LNA with an excellent gain flatness for 60 GHz 16QAM modulation in 65 nm CMOS
Qinghong Bu, Ning Li, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 359 - 362 2011
-
A 60 GHz CMOS power amplifier using varactor cross-coupling neutralization with adaptive bias
Ryo Minami, Kota Matsushita, Hiroki Asada, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 789 - 792 2011
-
Short range and long range millimeter wave systems and RF/BB SoCs
Akira Matsuzawa, Kenichi Okada
2011 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2011 93 - 96 2011
-
A 0.8-1.8 GHz wideband low noise amplifier with capacitive feedback
Toshihiko Ito, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 490 - 493 2011
-
A 25MHz-6.44GHz LC-VCO using a 5-port inductor for multi-band frequency generation
Wei Deng, Kenichi Okada, Akira Matsuzawa
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 2011
-
An ultra-low-voltage LC-VCO with a frequency extension circuit for future 0.5-V clock generation
Wei Deng, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 103 - 104 2011
-
Indoor and outdoor millimeter wave systems and RF/BB SoCs
Akira Matsuzawa, Kenichi Okada
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium 2011
-
A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE 802.15.3c
Kenichi Okada, Kota Matsushita, Keigo Bunsen, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Ning Li, Shogo Ito, Win Chaivipas, Ryo Minami, Akira Matsuzawa
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 160 - 161 2011
-
C-12-28 Investigation on CMOS Interconnects for High Frequency Applications
Han Changyo, Asada Hiroki, Matsushita Kota, Bunsen Keigo, Okada Kenichi, Matsuzawa Akira
Proceedings of the Society Conference of IEICE 2010 ( 2 ) 89 - 89 2010.8
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A 2-6 GHz fully integrated tunable CMOS power amplifier for multi-standard transmitters
Daisuke Imanishi, Jeeyoung Hong, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 351 - 352 2010
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A 60GHz direct-conversion transmitter in 65nm CMOS technology
Naoki Takayama, Kouta Matsushita, Shogo Ito, Ning Li, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 363 - 364 2010
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10MHz to 7GHz quadrature signal generation using a divide-by-4/3, -3/2, -5/3, -2, -5/2, -3, -4, and -5 injection-locked frequency divider
Shoichi Hara, Kenichi Okada, Akira Matsuzawa
IEEE Symposium on VLSI Circuits, Digest of Technical Papers 51 - 52 2010
-
Evaluation of a multi-line de-embedding technique for millimeter-wave CMOS circuit design
Qing Hong Bu, Ning Li, Keigo Bunsen, Hiroki Asada, Kota Matsushita, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 1901 - 1904 2010
-
A 2.4 GHz fully integrated CMOS power amplifier using capacitive cross-coupling
Jee Young Hong, Daisuke Imanishi, Kenichi Okada, Akira Matsuzawa
2010 IEEE International Conference on Wireless Information Technology and Systems, ICWITS 2010 2010
-
A 0.5-V, 0.05-to-3.2 GHz, 4.1-to-6.4 GHz LC-VCO using E-TSPC frequency divider with forward body bias for sub-picosecond-jitter clock generation
Wei Deng, Kenichi Okada, Akira Matsuzawa
2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010 93 - 96 2010
-
A 58-63.6GHz quadrature PLL frequency synthesizer in 65nm CMOS
Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chiavipas, Kenichi Okada, Akira Matsuzawa
2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010 189 - 192 2010
-
A 24 dB gain 51-68 GHz CMOS low noise amplifier using asymmetric-layout transistors
Ning Li, Keigo Bunsen, Naoki Takayama, Qinghong Bu, Toshihide Suzuki, Masaru Sato, Tatsuya Hirose, Kenichi Okada, Akira Matsuzawa
ESSCIRC 2010 - 36th European Solid State Circuits Conference 342 - 345 2010
-
Low-loss millimeter-wave passives on Si Reviewed
Yusuke Uemichi, Hideki Hatakeyama, Takuya Aizawa, Shuhei Amakawa, Kenichi Okada, Noboru Ishihara, Kazuya Masu
2010 IEEE International Conference on Wireless Information Technology and Systems, ICWITS 2010 2010
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A 484-μm2 21-GHz LC-VCO beneath a stacked-spiral inductor
Rui Murakami, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2010, EuMW2010: Connecting the World, Conference Proceedings - European Microwave Conference, EuMC 2010 1615 - 1618 2010
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A 0.8-1.5 GHz multi-standard WCDMA receiver with an inter-stage tunable notch filter
Toshihiko Ito, Masaki Kanemaru, Satoshi Furuya, Dong Ta Ngoc Huy, Kenichi Okada, Akira Matsuzawa
European Microwave Week 2010, EuMW2010: Connecting the World, Conference Proceedings - European Microwave Conference, EuMC 2010 1118 - 1121 2010
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Accuracy Investigation of the De-embedding Technique using Open and Short Patterns for On-Wafer RF Characterization Reviewed
Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando
2010 ASIA-PACIFIC MICROWAVE CONFERENCE 1436 - 1439 2010
-
Low-impedance and high-Q transmission line for mmw VCO
You Nomiyama, Win Chaivipas, Kenichi Okada, Akira Matsuzawa
2009 IEEE Workshop on Signal Propagation on Interconnects, SPI '09 2009
-
CMOS device modeling for millimeter-wave power amplifiers
Kota Matsushita, Naoki Takayama, Ning Li, Shogo Ito, Kenichi Okada, Akira Matsuzawa
2009 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2009 68 - 71 2009
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A 9.3MHz to 5.7GHz tunable LC-based VCO using a divide-by-N injection-locked frequency divider
Shoichi Hara, Kenichi Okada, Akira Matsuzawa
Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 81 - 84 2009
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60 GHz injection locked frequency quadrupler with quadrature outputs in 65 nm CMOS process
Shoichi Hara, Takahiro Sato, Rui Murakami, Kenichi Okada, Akira Matsuzawa
APMC 2009 - Asia Pacific Microwave Conference 2009 2268 - 2271 2009
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A 0.114-mW dual-conduction class-C CMOS VCO with 0.2-V power supply
Kenichi Okada, You Nomiyama, Rui Murakami, Akira Matsuzawa
IEEE Symposium on VLSI Circuits, Digest of Technical Papers 228 - 229 2009
-
A 0.9-3.0 GHz fully integrated tunable CMOS power amplifier for multi-band transmitters
Daisuke Imanishi, Kenichi Okada, Akira Matsuzawa
Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 253 - 256 2009
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Multifunctional frequency converter MMIC for 38GHz band 600Mbps multi-level QAM wireless system
Shinji Nagamine, Fumio Ozawa, Toshifumi Shirosaki, Toru Taniguchi, Kenichi Okada
2009 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2009 229 - 232 2009
-
Reconfigurable RF CMOS circuit design for cognitive radios
Kenichi Okada, Akira Matsuzawa
2009 International SoC Design Conference, ISOCC 2009 96 - 99 2009
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Design optimization of voltage controlled oscillators in consideration of parasitic capacitance
Rui Murakami, Shoichi Hara, Kenichi Okada, Akira Matsuzawa
Midwest Symposium on Circuits and Systems 1010 - 1013 2009
-
A multi-line de-embedding technique for mm-Wave CMOS circuits
Naoki Takayama, Kouta Matsushita, Shogo Ito, Ning Li, Keigo Bunsen, Kenichi Okada, Akira Matsuzawa
APMC 2009 - Asia Pacific Microwave Conference 2009 143 - 146 2009
-
University LSI design contest
Kazutoshi Kobayashi, Kenichi Okada
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 2009
-
LVDS-type on-chip transmision line interconnect with passive equalizers in 90nm CMOS process Reviewed
Akiko Mineyama, Hiroyuki Ito, Takahiro Ishii, Kenichi Okada, Kazuya Masu
2008 ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 809 - + 2008
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A CMOS direct sampling mixer using Switched Capacitor Filter technique for software-defined radio
Hong Phuc Ninh, Takashi Moue, Takashi Kurashina, Kenichi Okada, Akira Matsuzawa
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 103 - 104 2008
-
Design space exploration of low-phase-noise LC-VCO using multiple-divide technique
Shoichi Hara, Takeshi Ito, Kenichi Okada, Akira Matsuzawa
Proceedings - IEEE International Symposium on Circuits and Systems 1966 - 1969 2008
-
A Low Phase Noise LC-VCO with a High-Q Inductor Fabricated by Wafer Level Package Technology Reviewed
Kazuma Ohashi, Yuka Kobayashi, Hiroyuki Ito, Kenichi Okada, Hideki Hatakeyama, Takuya Aizawa, Tatsuya Ito, Ryozo Yamauchi, Kazuya Masu
2008 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, VOLS 1 AND 2 107 - + 2008
-
Small-area CMOS RF distributed mixer using multi-port inductors Reviewed
Susumu Sadoshima, Satoshi Fukuda, Tackya Yammtouch, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
2008 ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 5 - + 2008
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High-frequency characteristics of on-chip wirings up to 110 GHz Reviewed
Kazuya Miyashita, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
ADVANCED METALLIZATION CONFERENCE 2007 (AMC 2007) 23 309 - 313 2008
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A low-power differential transmission line interconnect using wafer level package technology Reviewed
Tomoaki Maekawa, Takahiro Ishii, Junki Seita, Hiroyuki Ito, Kenichi Okada, Hideki Hatakeyama, Yusuke Uemichi, Takuya Aizawa, Tatsuya Ito, Ryozo Yamauchi, Kazuya Masu
2008 IEEE WORKSHOP ON SIGNAL PROPAGATION ON INTERCONNECTS 99 - + 2008
-
A 80GHz voltage controlled oscillator utilizing a negative varactor in 90nm CMOS technology
Win Chaivipas, Kenichi Okada, Akira Matsuzawa
Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008 133 - 136 2008
-
A three-stage 60GHz CMOS LNA using dual noise-matching technique for 5dB NF
Ning Li, Kenichi Okada, Akira Matsuzawa, Toshihide Suzuki, Tatsuya Hirose
Proceedings of 2008 Asia Pacific Microwave Conference, APMC 2008 2008
-
Wafer-Level-Packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type Voltage Controlled Oscillator
Hideki Hatakeyama, Kenichi Okada, Kazuma Ohashi, Yusaku Ito, Naoyuki Ozawa, Masakazu Sato, Takuya Aizawa, Tatsuya Ito, Ryozo Yamauchi, Kazuya Masu
Advanced Metallization Conference (AMC) 315 - 320 2008
-
High-frequency characteristics of on-chip wirings up to 110 GHz
Kazuya Miyashita, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
Advanced Metallization Conference (AMC) 309 - 313 2008
-
Wafer-level-packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type Voltage Controlled Oscillator Reviewed
Hideki Hatakeyama, Kenichi Okada, Kazuma Ohashi, Yusaku Ito, Naoyuki Ozawa, Masakazu Sato, Takuya Aizawa, Tatsuya Ito, Ryozo Yamauchi, Kazuya Masu
ADVANCED METALLIZATION CONFERENCE 2007 (AMC 2007) 23 315 - 320 2008
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Numerical analysis of asymmetric differential inductors
Masaki Kanemaru, Daisuke Imanishi, Kenichi Okada, Akira Matsuzawa
Proceedings of 2008 Asia Pacific Microwave Conference, APMC 2008 2008
-
A 8-gbps low-latency multi-drop on-chip transmission line interconnect with 1.2-mW two-way transceivers Reviewed
Hiroyuki Ito, Makoto Kimura, Kenichi Okada, Kazuya Masu
2007 Symposium on VLSI Circuits, Digest of Technical Papers 136 - 137 2007
-
Design of high-density interconnects for high-speed transmission Reviewed
Wanlin Fu, Makoto Kimura, Kenichi Okada, Jun Sakai, Kazuya Masu
57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS 352 - + 2007
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A Low-Power Low-Phase-Noise CMOS VCO using RF SiP Technology Reviewed
Kazuma Ohashi, Yusaku Ito, Hiroyuki Ito, Kenichi Okada, Hideki Hatakeyama, Naoyuki Ozawa, Masakazu Sato, Takuya Aizawa, Tatsuya Ito, Ryozo Yamauchi, Kazuya Masu
2007 ASIA PACIFIC MICROWAVE CONFERENCE, VOLS 1-5 1963 - + 2007
-
A 5.2 GHz CMOS low noise amplifier with high-Q inductors embedded in wafer-level chip-scale package Reviewed
Satoshi Fukuda, Hiroyuki Ito, Kazuhisa Itoi, Masakazu Sato, Tatsuya Ito, Ryozo Yamauchi, Kenichi Okada, Kazuya Masu
2007 IEEE INTERNATIONAL WORKSHOP ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY, PROCEEDINGS 34 - + 2007
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A low-latency and high-power-efficient on-chip LVDS transmission line interconnect for an RC interconnect alternative Reviewed
Hiroyuki Ito, Junki Seita, Takahiro Ishii, Hideyuki Sugita, Kenichi Okada, Kazuya Masu
PROCEEDINGS OF THE IEEE 2007 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE 193 - + 2007
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Modeling of three-port SiCMOS on-chip symmetric inductor for various operation modes Reviewed
Kenichi Okada, Hirotaka Sugawara, Kazuyasu Nishikawa, Kazuya Masu
2007 EUROPEAN MICROWAVE CONFERENCE, VOLS 1-4 520 - + 2007
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Fine and wide frequency tuning digital controlled oscillators utilizing capacitance position sensitivity in distributed resonators
Win Chaivipas, Takeshi Ito, Takashi Kurashina, Kenichi Okada, Akira Matsuzawa
2007 IEEE Asian Solid-State Circuits Conference, A-SSCC 424 - 427 2007
-
Dynamic reconfigurable Si CMOS VCO using a transmission-line resonator with PMOS-bias and PMOS-crosscouple topology
Takeshi Ito, Win Chaivipas, Kenichi Okada, Akira Matsuzawa
Asia-Pacific Microwave Conference Proceedings, APMC 2007
-
Adaptable wire-length distribution with tunable occupation probability
Shuhei Amakawa, Takumi Uezono, Takashi Sato, Kenichi Okada, Kazuya Masu
International Workshop on System Level Interconnect Prediction, SLIP 1 - 8 2007
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A 0.026mm2 capacitance-to-digital converter for biotelemetry applications using a charge redistribution technique
Kota Tanaka, Yasuhide Kuramochi, Takashi Kurashina, Kenichi Okada, Akira Matsuzawa
2007 IEEE Asian Solid-State Circuits Conference, A-SSCC 244 - 247 2007
-
Modeling of multi-port inductor considering mutual components Reviewed
Takeshi Ito, Kenichi Okada, Kazuya Masu
69th ARFTG Microwave Measurements Conference - Addressing Metrology Needs for Future High-Speed Information and Communications Systems 2007
-
Transmission line interconnect on Si CMOS LSI Reviewed
Kazuya Masu, Kenichi Okada, Hiroyuki Ito
ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings 306 - 309 2007
-
A wideband CMOS LC-VCO using variable inductor Reviewed
Kazuma Ohashi, Yusaku Ito, Yoshiaki Yoshihara, Kenichi Okada, Kazuya Masu
PROCEEDINGS OF THE ASP-DAC 2007 98 - + 2007
-
A multi-drop transmission-line interconnect in si LSI Reviewed
Junki Seita, Hiroyuki Ito, Kenichi Okada, Takashi Sato, Kazuya Masu
PROCEEDINGS OF THE ASP-DAC 2007 118 - + 2007
-
On-chip Differential-Transmission-Line(DTL) interconnect for 22nm technology Reviewed
Kenichi Okada, Hiroyuki Ito, Kazuya Masu
Advanced Metallization Conference 2006 (AMC 2006) 2006 29 - 33 2007
-
Small-area CMOS RF distributed mixer using multi-port inductors Reviewed
Tackya Yammouch, Kenichi Okada, Kazuya Masu
2007 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, DIGEST OF PAPERS 123 - + 2007
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Reconfigurable CMOS low noise amplifier using variable bias circuit for self compensation Reviewed
Satoshi Fukuda, Daisuke Kawazoe, Kenichi Okada, Kazuya Masu
PROCEEDINGS OF THE ASP-DAC 2007 104 - + 2007
-
RF passive components using metal line on SiCMOS Reviewed
Kazuya Masu, Kenichi Okada, Hiroyuki Ito
IEICE TRANSACTIONS ON ELECTRONICS E89C ( 6 ) 681 - 691 2006.6
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Via distribution model for yield estimation Reviewed
Takumi Uezono, Kenichi Okada, Kazuya Masu
ISQED 2006: PROCEEDINGS OF THE 7TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN 479 - + 2006
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Quality factor enhancement of on-chip inductor by using negative impedance circuit Reviewed
Khoa D. Pham, Kenichi Okada, Kazuya Masu
2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems - Digest of Papers 2006 115 - 118 2006
-
On-chip transmission line interconnect for Si CMOS LSI Reviewed
Kazuya Masu, Kenichi Okada, Hiroyuki Ito
2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems - Digest of Papers 2006 353 - 356 2006
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A 0.98 to 6.6 GHz tunable wideband VCO in a 180 nm CMOS technology for reconfigurable radio transceiver Reviewed
Yusaku Ito, Hirotaka Sugawara, Kenichi Okada, Kazuya Masu
2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 359 - 362 2006
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A reconfigurable RF circuit architecture for dynamic power reduction Reviewed
Daisuke Kawazoe, Hirotaka Sugawara, Takeshi Ito, Kenichi Okada, Kazuya Masu
TENCON 2005 - 2005 IEEE REGION 10 CONFERENCE, VOLS 1-5 2007 2113 - + 2006
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Reconfigurable CMOS low noise amplifier for self compensation Reviewed
Daisuke Kawazoe, Hirotaka Sugawara, Takeshi Ito, Kenichi Okada, Kazuya Masu
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS 3410 - + 2006
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A loss optimization method using WD product for on-chip differential transmission line design Reviewed
Hiroyuki Ito, Kenichi Okada, Kazuya Masu
10TH IEEE WORKSHOP ON SIGNAL PROPAGATION ON INTERCONNECTS, PROCEEDINGS 217 - + 2006
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High-crosstalk robustness transmission line interconnect in si LSI using zero-crosstalk structurea Reviewed
Makoto Kimura, Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Kazuya Masu
10TH IEEE WORKSHOP ON SIGNAL PROPAGATION ON INTERCONNECTS, PROCEEDINGS 153 - + 2006
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A DC-7 GHz small-area distributed amplifier using 5-port inductors in a 180 nm Si CMOS technology Reviewed
Takeshi Ito, Daisuke Kawazoe, Kenichi Okada, Kazuya Masu
2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 363 - 366 2006
-
High-density differential transmission line bus structure for future subnanometer technologies Reviewed
M Kimura, H Ito, H Sugita, K Okada, K Masu
ADVANCED METALLIZATION CONFERENCE 2005 (AMC 2005) 143 - 149 2006
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Special section on VLSI Design and CAD Algorithms Reviewed
Hidetoshi Onodera, Makoto Ikeda, Tohru Ishihara, Tsuyoshi Isshiki, Koji Inoue, Kenichi Okada, Seiji Kajihara, Mineo Kaneko, Hiroshi Kawaguchi, Shinji Kimura, Morihiro Kuga, Atsushi Kurokawa, Takashi Sato, Toshiyuki Shibuya, Yoichi Shiraishi, Kazuyoshi Takagi, Atsushi Takahashi, Yoshinori Takeuchi, Nozomu Togawa, Hiroyuki Tomiyama, Yuichi Nakamura, Kiyoharu Hamaguchi, Yukiya Miura, Shin-Ichi Minato, Ryuichi Yamaguchi, Masaaki Yamada, Yasushi Yuminaka, Takayuki Watanabe, Masanori Hashimoto, Masayuki Miyazaki
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E89-A ( 12 ) 3377 2006
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A batteryless wireless communication circuit for measurement of gastric acid Reviewed
Yuka Kobayashi, Koichi Ishida, Kenichi Okada, Kazuya Masu, Yasuhiro Horiike
IEEE 2006 Biomedical Circuits and Systems Conference Healthcare Technology, BioCAS 2006 5 - 8 2006
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Reconfigurable CMOS low noise amplifier for self compensation
Daisuke Kawazoe, Hirotaka Sugawara, Takeshi Ito, Kenichi Okada, Kazuya Masu
Proceedings - IEEE International Symposium on Circuits and Systems 3410 - 3413 2006
-
Distributed constant passive devices using wafer-level chip scale package technology for one-chip wireless communication circuits Reviewed
J Seita, H Ito, H Sugita, K Okada, T Ito, K Itoi, M Sato, K Masu
2006 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, DIGEST OF PAPERS 2006 338 - + 2006
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Special section on VLSI design technology in the sub-100 nm era
Masayuki Mizuno, Fumio Arakawa, Junko Fujii, Mototsugu Hamada, Kunihiko Iizuka, Makoto Ikeda, Tetsuro Itakura, Hideyuki Kabuo, Takayuki Kawahara, Shoji Kawahito, Kazutoshi Kobayashi, Koji Kotani, Takashi Kurashina, Makoto Nagata, Kazuyuki Nakamura, Kenichi Okada, Yukihito Oowaki, Hiroyuki Yamauchi, Yuu Watanabe, Akira Matsuzawa
IEICE Transactions on Electronics E89-C ( 3 ) 211 - 212 2006
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A 6.5-mW 5-gbps on-chip differential transmission line interconnect with a low-latency asymmetric Tx in a 180nm CMOS technology
Takahiro Ishii, Hiroyuki Ito, Makoto Kimura, Kenichi Okada, Kazuya Masu
2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 131 - 134 2006
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Estimation of power reduction by on-chip transmission line for 45nm technology Reviewed
Kenichi Okada, Takumi Uezono, Kazuya Masu
INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION 4148 181 - 190 2006
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Wire length distribution model considering core utilization for system on chip Reviewed
T Kyogoku, J Inoue, H Nakashima, T Uezono, K Okada, K Masu
IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS 276 - 277 2005
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On-chip variable inductor using MOSFET switches Reviewed
Khoa Dang Pham, Kenichi Okada, Kazuya Masu
35th European Microwave Conference, Vols 1-3, Conference Proceedings 2 1347 - 1350 2005
-
Reconfigurable CMOS LNA for software defined radio using variable inductor Reviewed
Hirotaka Sugawara, Yoshiaki Yoshihara, Kenichi Okada, Kazuya Masu
35th European Microwave Conference, Vols 1-3, Conference Proceedings 3 1947 - 1950 2005
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A 1.3-2.8 GHz wide range CMOS LC-VCO using variable inductor Reviewed
Yusaku Ito, Yoshiaki Yoshihara, Hirotaka Sugawara, Kenichi Okada, Kazuya Masu
2005 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS 265 - 268 2005
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Comparison of compact on-chip inductors embedded in wafer-level package Reviewed
K Itoi, M Sato, K Okada, K Masu, T Ito
55TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2005 PROCEEDINGS 2 1578 - 1583 2005
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Prediction of delay time for future LSI using on-chip transmission line interconnects Reviewed
Takumi Uezono, Junpei Inoue, Takanori Kyogoku, Kenichi Okada, Kazuya Masu
International Workshop on System Level Interconnect Prediction, SLIP 7 - 12 2005
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4 Gbps on-chip interconnection using differential transmission line Reviewed
Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Kazuya Masu
2005 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS 417 - 420 2005
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A dynamic reconfigurable RF circuit architecture Reviewed
Kenichi Okada, Yoshiaki Yoshihara, Hirotaka Sugawara, Kazuya Masu
ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 2 683 - 686 2005
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Evaluation of on-chip transmission line interconnect using wire length distribution Reviewed
Junpei Inoue, Hiroyuki Ito, Shinichiro Gomi, Takanori Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu
ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 1 133 - 138 2005
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Reconfigurable CMOS LNA for software defined radio using variable inductor Reviewed
Hirotaka Sugawara, Yoshiaki Yoshihara, Kenichi Okada, Kazuya Masu
2005 EUROPEAN CONFERENCE ON WIRELESS TECHNOLOGIES (ECWT), CONFERENCE PROCEEDINGS 2005 547 - 550 2005
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On-chip high-Q Cu inductors embedded in wafer-level chip-scale package for silicon RF application
Kazuhisa Itoi, Masakazu Sato, Hiroshi Abe, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu, Tatsuya Ito
IEEE MTT-S International Microwave Symposium Digest 1 197 - 200 2004
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On-chip transmission line for long global interconnects
Hiroyuki Ito, Junpei Inoue, Shinichiro Gomi, Hideyuki Sugita, Kenichi Okada, Kazuya Masu
Technical Digest - International Electron Devices Meeting, IEDM 677 - 680 2004
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Modeling and optimization of on-chip spiral inductor in S-parameter domain Reviewed
K Okada, H Hoshino, H Onodera
2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5, PROCEEDINGS 5 153 - 156 2004
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A statistical gate-delay model considering intra-gate variability Reviewed
K Okada, K Yamaoka, H Onodera
ICCAD-2003: IEEE/ACM DIGEST OF TECHNICAL PAPERS 908 - 913 2003
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A statistical gate delay model for intra-chip and inter-chip variabilities Reviewed
K Okada, K Yamaoka, H Onodera
ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2003-January 31 - 36 2003
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Statistical modeling of gate-delay variation with consideration of intra-gate variability Reviewed
K Okada, K Yamaoka, H Onodera
PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V 5 513 - 516 2003
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Low crosstalk differential transmission line interconnect on Si ULSI
Hiroyuki Ito, Shinichiro Gomi, Hirotaka Sugawara, Kenichi Okada, Kazuya Masu
Advanced Metallization Conference (AMC) 53 - 58 2003
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Statistical Gate-Delay Modeling with Intra-gate Variability
K. Okada, K. Yamaoka, H. Onodera
IPSJ SIG Notes 2002 ( 113 ) 91 - 96 2002.11
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トランジスタ特性のチップ内ばらつきを考慮した統計遅延解析手法 Reviewed
岡田健一, 山岡健人, 藤田智弘, 小野寺秀俊
第15回 回路とシステム(軽井沢)ワークショップ論文集 499 - 504 2002.4
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チップ内でのばらつきを考慮したトランジスタ特性ばらつきモデル化手法
岡田健一, 小野寺秀俊
DAシンポジウム2001年論文集 241 - 246 2001.7
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Statistical modeling of device characteristics with systematic fluctuation Reviewed
Kenichi Okada, Hidetoshi Onodera
Proceedings - IEEE International Symposium on Circuits and Systems 2 II-437-II-440 2000.5
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A method for linking process-level variability to system performances Reviewed
Tomohiro Fujita, Ken-Ichi Okada, Hiroaki Fujita, Hidetoshi Onodera, Keikichi Tamaru
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 547 - 551 2000
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レイアウトを考慮したCMOS回路の比精度解析 Reviewed
岡田健一, 小野寺秀俊, 田丸啓吉
第11回回路とシステム軽井沢ワークショップ論文集 409 - 414 1998.4
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MOS集積回路の統計的モデル化手法
近藤正樹, 藤田智弘, 岡田健一, 小野寺秀俊, 田丸啓吉
第1回システムLSI琵琶湖ワークショップ資料集 437 - 442 1997.11
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A global routing algorithm for analog circuits using a resistor array model Reviewed
K Okada, H Onodera, K Tamaru
ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 4 4 667 - 670 1996
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COMPACTION WITH SHAPE OPTIMIZATION AND ITS APPLICATION TO LAYOUT RECYCLING Reviewed
K OKADA, H ONODERA, K TAMARU
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E78A ( 2 ) 169 - 176 1995.2
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COMPACTION WITH SHAPE OPTIMIZATION Reviewed
K OKADA, H ONODERA, K TAMARU
PROCEEDINGS OF THE IEEE 1994 CUSTOM INTEGRATED CIRCUITS CONFERENCE 545 - 548 1994
Books
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Advanced Microwave Circuits and Systems
2010 （ ISBN:9789533070872 ）
-
Advanced Microwave Circuits and Systems
2010 （ ISBN:9789533070872 ）
MISC
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サブテラヘルツ波を用いた無線LAN評価系の試作
清水 聡, 松室 尭之, 後藤 遼, 阿野 進, 矢野 一人, 坂野 寿和, Chenxin Liu, 田 安宜, 山崎 雄大, 酒井 啓之, 國弘 和明, 岡田 健一
電子情報通信学会 総合大会講演論文集 2025.3
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24GHz無線電力伝送型を用いたミリ波帯5G中継器におけるGaAsダイオード型整流器およびミキサ
平山 敦也, 井出 倫滉, 湯浅 景斗, 加藤 星凪, 伊達 脩, 白根 篤史, 岡田 健一
電子情報通信学会総合大会講演論文集 2025.3
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ミリ波帯無線電力伝送及び5G通信のための電力合成器とGaAs整流器の研究
菊地 真之, 井出 倫滉, MAYEDA Jill, 加藤 星凪, 岡田 健一, 白根 篤史
電子情報通信学会総合大会講演論文集 2025.3
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低軌道衛星用折り畳み構造フェーズドアレイKa帯無線機CMOSビームフォーミングICのTID耐性に関する研究
成清 泰斗, Dongwon You, 岡田 健一, 白根 篤史
電子情報通信学会総合大会講演論文集 2025.3
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ミリ波帯5Gバッテリーレス無線機に向けた整流器型4次サブハーモニックミキサー回路
加藤 星凪, 伊達 脩, Tao Ruoxin, 成清 泰斗, 林 拓希, 湯浅 景斗, 井出 倫滉, 岡田 健一, 白根 篤史
電子情報通信学会;総合大会講演論文集 2025.3
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A Small-Satellite-Mounted Ka-Band CMOS Phased-Array Transmitter Using Adaptive Scan Impedance Tuner and Active XPD Calibration Technique
Xiaolin Wang, Dongwon You, Yun Wang, Xi Fu, Hans Herdian, Ashbir Fadila, Hojun Lee, Michihiro Ide, Sena Kato, Zheng Li, Jian Pang, 岡田 健一, 白根 篤史
電子情報通信学会 総合大会講演論文集 2025.3
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超小型衛星搭載 Ka 帯展開型無線機用リジッドフレキシブル基板
林 拓希, 成清 泰斗, Delburg Mitchao, 加藤 星凪, 坂本 啓, 岡田 健一, 白根 篤史
電子情報通信学会総合大会講演論文集 2025.3
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CMOS4×4マトリクスを用いたミリ波帯5G中継機のためのビーム制御不要な無線機
伊達 脩, 湯浅 景斗, 井手 倫弘, 加藤 星凪, 岡田 健一, 白根 篤史
電子情報通信学会総合大会講演論文集 2025.3
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低損失差動出力バトラーマトリクスによる無線給電型中継機
湯浅 景斗, 加藤 星凪, 井出 倫滉, 戸村 崇, 岡田 健一, 白根 篤史
2025.3
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双方向トランシーバアーキテクチャを備えたミリ波ビームフォーミングICとアンテナモジュール技術—オープンネットワーク技術特集 : オープンかつグリーンな社会を支えるネットワーク技術と先進ソリューション ; 5G/Beyond 5Gに向けた無線技術
大島 直樹, 堀 真一, PANG Jian, 白根 篤史, 岡田 健一, 國弘 和明
NEC技報 = NEC technical journal / NECマネジメントパートナー株式会社 編 75 ( 1 ) 47 - 51 2023.6
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ビーム角制御型24GHz無線給電を用いた5G向け再帰反射型フェーズドアレイ無線機—情報センシング Invited
井出 倫滉, 湯浅 景斗, 加藤 星凪, Dongwon You, Ashbir Aviat Fadila, Jian Pang, 白根 篤史, 岡田 健一
映像情報メディア学会技術報告 = ITE technical report 46 ( 23 ) 97 - 102 2022.8
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5G/Beyond 5Gを実現するミリ波フェイズドアレー無線機技術—Millimeter-wave Phased-array Transceiver for 5G and Beyond—小特集 5G/Beyond 5Gを実現する技術 : フロントエンドデバイスから仮想化まで
岡田 健一, パン ジェン, 白根 篤史, 大島 直樹, 國弘 和明
電子情報通信学会誌 = The journal of the Institute of Electronics, Information and Communication Engineers 105 ( 8 ) 706 - 712 2022.8
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Reflection Suppression of 26-GHz-Band Wide-Angle Beam Steering Patch Array by Dipoles
戸村崇, 白根篤史, 岡田健一, 永島隆, 須藤順平
電子情報通信学会大会講演論文集(CD-ROM) 2022 2022
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300 GHz Power Amplifier and 120 Gb/s, 9.8 m Wireless Transmission Based on 80-nm InP-HEMT Technology
HAMADA Hiroshi, TSUTSUMI Takuya, MATSUZAKI Hideaki, SUGIYAMA Hiroki, ITAMI Go, FUJIMURA Takuya, ABDO Ibrahim, SHIRANE Atsushi, OKADA Kenichi, SONG Ho-Jin, NOSAKA Hideyuki
電子情報通信学会論文誌 C(Web) J104-C ( 9 ) 257 - 266 2021.9
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High efficiency 24GHz Rectifier for Millimeter-wave Band 5G Battery-less Relay
加藤星凪, 井出倫滉, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2021 2021
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Millimeter-wave band 5G batteryless receiver with phased array rectifier array rectifier
湯浅景斗, 井出倫滉, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2021 2021
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A Beam Steerable Backscatter for Millimeter-Wave 5G Relay Transceiver
井出倫滉, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2021 2021
-
5G Evolution R&D activities for improving power efficient millimeter-wave technologies
浅野弘明, 志水紀之, 奥田雅久, 岡田健一, PANG Jian, 白根篤史, 堀真一, 國弘和明, 金子友哉
電子情報通信学会大会講演論文集(CD-ROM) 2020 2020
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Wireless Device Identification with Quadrant IQ Transition Image
田村比呂, 柳澤潔, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2020 106 - 109 2020
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超小型衛星向けロール型大面積フェーズドアレイ無線機の研究開発—Large-size flexible phased-array transceiver for low-earth-orbit small satellites
岡田 健一, 白根 篤史
研究報告書 フジクラ財団 [編] 6p 2020
-
CNN Accelerator Design for IoT devices
柳澤潔, 田村比呂, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2020 2020
-
RF-DC Converter With a Series Power Combiner for Millimeter-wave Wireless Power Transfer
井出倫滉, YOU Dongwon, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2020 2020
-
Storability of Space Deployable Textile Membrane Structures with Flexible Electrical Circuits
大野奎悟, 坂本啓, 大熊政明, 岡田健一, 白根篤史, 戸村崇, YOU Dongwon
宇宙太陽発電(Web) 5 2020
-
Verification of the Performance of Wireless Device Classification with Image Analysis of IQ Transition
田村比呂, 柳澤潔, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2020 2020
-
A Fully Synthesizable Symbol Timing Recovery Circuit for Low Power Wireless Receiver (集積回路)
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 118 ( 507 ) 73 - 76 2019.3
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ミリ波無線機に向けた局部発振信号生成用高次高調波抑圧6倍周波数逓倍器
ALVIN Joshua, PANG Jian, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2019 2019
-
60GHz帯のLOリークとI/Qミスマッチ校正できる双方向ミキサ
HUANG Zhongliang, PANG Jian, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2019 2019
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妨害波抑圧回路を用いたKa帯衛星通信向けCMOS受信機
川口敦広, WANG Yun, YOU Dongwon, 中村岳資, FADILA Ashbir Aviat, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2019 2019
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第5世代移動通信システムに向けた28GHz帯双方向増幅器
LUO Xueting, PANG Jian, LI Zheng, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2019 2019
-
無線受信ICにおける妨害波を考慮した回路仕様設計
白根篤史, 岡田健一
電子情報通信学会技術研究報告 118 ( 506(MW2018 156-182) ) 2019
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深層学習による無線端末同定および分類
柳澤潔, 田村比呂, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2019 2019
-
ミリ波帯送信回路のイメージ信号抑制
松本大輝, WANG Yun, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2018 2018
-
300GHz帯オンチップVivaldiアンテナの設計
三浦剛志, 藤村拓弥, ABDO Ibrahim, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2018 2018
-
28GHz帯フェーズドアレイ送信機の位相変動の改善
中村岳資, JIAN Pang, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2018 2018
-
ゲイン変動の小さいベクトル加算型28GHz帯CMOS移相器
窪添諒, JIAN Pang, LI Zheng, 川渕賢, 白根篤史, 岡田健一
電子情報通信学会大会講演論文集(CD-ROM) 2018 2018
-
YAO Yuki, HIRANO Takuichi, OKADA Kenichi, HIROKAWA Jiro, ANDO Makoto
IEICE technical report. Antennas and propagation 113 ( 300 ) 25 - 30 2013.11
-
A Study of Radiation Efficiency Improvement of an On-Chip Dipole Antenna by Inserting Partially High Resistance Region in the Silicon Substrate
Yao Yuki, Hirano Takuichi, Okada Kenichi, Hirokawa Jiro, Ando Makoto
Proceedings of the Society Conference of IEICE 2013 ( 1 ) 90 - 90 2013.9
-
B-1-68 Characteristic of an On-Chip Loop Antenna Considering Conductive Layer and Influence of the Conductivity of Silicon Substrate
Yao Yuki, Hirano Takuichi, Okada Kenichi, Hirokawa Jiro, Ando Makoto
Proceedings of the IEICE General Conference 2013 ( 1 ) 68 - 68 2013.3
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HIRANO Takuichi, OKADA Kenichi, HIROKAWA Jiro, ANDO Makoto
IEICE technical report. Electromagnetic compatibility 112 ( 256 ) 55 - 60 2012.10
-
SUMIDA Takashi, HIRANO Takuichi, OKADA Kenichi, HIROKAWA Jiro, ANDO Makoto
IEICE technical report. Microwaves 112 ( 251 ) 47 - 52 2012.10
-
C-12-11 Indutors and Transformers on 65 nm CMOS Technology for 60 GHz Applications
Kiumarsi Hamid, Ito Hiroyuki, Okada Kenichi, Ishihara Noboru, Masu Kazuya
Proceedings of the Society Conference of IEICE 2012 ( 2 ) 84 - 84 2012.8
-
HIRANO Takuichi, OKADA Kenichi, HIROKAWA Jiro, ANDO Makoto
IEICE technical report. Antennas and propagation 111 ( 487 ) 55 - 60 2012.3
-
C-15-3 Electromagnetic Analysis of Equivalent Material Parameters for Dummy Metal Fills in a CMOS chip
Hirano Takuichi, Okada Kenichi, Hirokawa Jiro, Ando Makoto
Proceedings of the IEICE General Conference 2012 ( 1 ) 310 - 310 2012.3
-
C-2-64 Electromagnetic Analysis of a Spiral Inductor on Silicon CMOS Substrate in the Millimeter-wave band
Sumida Takashi, Hirano Takuichi, Okada Kenichi, Ando Makoto, Hirokawa Jiro
Proceedings of the IEICE General Conference 2012 ( 1 ) 105 - 105 2012.3
-
HIRANO Takuichi, OKADA Kenichi, HIROKAWA Jiro, ANDO Makoto
111 ( 412 ) 207 - 210 2012.1
-
A Study of EM Simulation Modeling for Excitations using GSG Pads with Symmetric Circuit in On-Wafer Measurement
HIRANO Takuichi, OKADA Kenichi, HIROKAWA Jiro, ANDO Makoto
2011 ( 57 ) 79 - 84 2011.7
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C-2-82 Broadside 3-dB Tandem Coupler Using WLP Technology for 60 GHz Applications
Kiumarsi Hamid, Tanoi Satoru, Uemichi Yusuke, Hatakeyama Hideki, Aizawa Takuya, Ito Hiroyuki, Okada Kenichi, Ishihara Noboru, Masu Kazuya
Proceedings of the IEICE General Conference 2011 ( 1 ) 120 - 120 2011.2
-
De-embedding of pads using Thru-Line (TL) calibration
IEICE technical report 110 ( 156 ) 81 - 86 2010.7
-
A Wide-Tunable LC-Based Voltage-Controlled Oscillator Using a Divide-by-N Injection-Locked Frequency Divider
Shoichi Hara, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E93C ( 6 ) 763 - 769 2010.6
-
A Wide-Tunable LC-Based Voltage-Controlled Oscillator Using a Divide-by-N Injection-Locked Frequency Divider
Shoichi Hara, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E93C ( 6 ) 763 - 769 2010.6
-
Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators
Rui Murakami, Shoichi Hara, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E93C ( 6 ) 777 - 784 2010.6
-
Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators
Rui Murakami, Shoichi Hara, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E93C ( 6 ) 777 - 784 2010.6
-
A De-Embedding Method Using Different-Length Transmission Lines for mm-Wave CMOS Device Modeling
Naoki Takayama, Kota Matsushita, Shogo Ito, Ning Li, Keigo Bunsen, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E93C ( 6 ) 812 - 819 2010.6
-
A De-Embedding Method Using Different-Length Transmission Lines for mm-Wave CMOS Device Modeling
Naoki Takayama, Kota Matsushita, Shogo Ito, Ning Li, Keigo Bunsen, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E93C ( 6 ) 812 - 819 2010.6
-
Evaluation of a Multi-Line De-Embedding Technique up to 110 GHz for Millimeter-Wave CMOS Circuit Design
Ning Li, Kota Matsushita, Naoki Takayama, Shogo Ito, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E93A ( 2 ) 431 - 439 2010.2
-
The Optimum Design Methodology of Low-Phase-Noise LC-VCO Using Multiple-Divide Technique
Shoichi Hara, Rui Murakami, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E93A ( 2 ) 424 - 430 2010.2
-
Evaluation of a Multi-Line De-Embedding Technique up to 110 GHz for Millimeter-Wave CMOS Circuit Design
Ning Li, Kota Matsushita, Naoki Takayama, Shogo Ito, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E93A ( 2 ) 431 - 439 2010.2
-
The Optimum Design Methodology of Low-Phase-Noise LC-VCO Using Multiple-Divide Technique
Shoichi Hara, Rui Murakami, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E93A ( 2 ) 424 - 430 2010.2
-
Characterization of On-Chip Multiport Inductors for Small-Area RF Circuits
Takeshi Ito, Kenichi Okada, Kazuya Masu
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 56 ( 8 ) 1590 - 1597 2009.8
-
Characterization of On-Chip Multiport Inductors for Small-Area RF Circuits
Takeshi Ito, Kenichi Okada, Kazuya Masu
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 56 ( 8 ) 1590 - 1597 2009.8
-
Tunable CMOS LNA Using a Variable Inductor for a Reconfigurable RF Circuit
Hirotaka Sugawara, Kenichi Okada, Kazuya Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E92A ( 2 ) 401 - 410 2009.2
-
Propagation Constant Analysis for a Transmission Line with Dummy Metals by Eigenmode Analysis of a Unit-Cell
Yuuya Ono, Takuichi Hirano, Kenichi Okada, JIRO HIROKAWA, Makoto Ando
IEICE Tech. Rep 2009
-
ダミーメタル入り伝送線路のユニットセルの固有値解析による伝搬定数の計算
小野 雄也, 平野 拓一, 岡田 健一, 廣川 二郎, 安藤 真
第21回シリコンアナログRF研究会, 2009年11月10日 9 2009
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Tunable CMOS LNA Using a Variable Inductor for a Reconfigurable RF
Hirotaka SUGAWARA, Kenichi OKADA, Kazuya MASU
IEICE Transactions on Fundamentals of Electronics E92-A ( 2 ) 401 - 410 2009
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Analysis of CMOS transconductance amplifiers for sampling mixers
Ning Li, Win Chaivipas, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E91C ( 6 ) 871 - 878 2008.6
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Analysis of CMOS transconductance amplifiers for sampling mixers
Ning Li, Win Chaivipas, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E91C ( 6 ) 871 - 878 2008.6
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Spatial sensitivity of capacitors in distributed resonators and its application to fine and wide frequency tuning digital controlled oscillators
Win Chaivipas, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E91C ( 6 ) 918 - 927 2008.6
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Spatial sensitivity of capacitors in distributed resonators and its application to fine and wide frequency tuning digital controlled oscillators
Win Chaivipas, Kenichi Okada, Akira Matsuzawa
IEICE TRANSACTIONS ON ELECTRONICS E91C ( 6 ) 918 - 927 2008.6
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Emerging issues in mixed signal LSIs
Kenichi Okada
Journal of Japan Institute of Electronics Packaging 11 ( 3 ) 207 - 211 2008.5
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Physical modeling of MEMS variable inductor
Tackya Yammouch, Kenichi Okada, Kazuya Masu
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 55 ( 5 ) 419 - 422 2008.5
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Physical modeling of MEMS variable inductor
Tackya Yammouch, Kenichi Okada, Kazuya Masu
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 55 ( 5 ) 419 - 422 2008.5
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A bidirectional- and multi-drop-transmission-line interconnect for multipoint-to-multipoint on-chip communications
Hiroyuki Ito, Makoto Kimura, Kazuya Miyashita, Takahiro Ishii, Kenichi Okada, Kazuya Masu
IEEE JOURNAL OF SOLID-STATE CIRCUITS 43 ( 4 ) 1020 - 1029 2008.4
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A bidirectional- and multi-drop-transmission-line interconnect for multipoint-to-multipoint on-chip communications
Hiroyuki Ito, Makoto Kimura, Kazuya Miyashita, Takahiro Ishii, Kenichi Okada, Kazuya Masu
IEEE JOURNAL OF SOLID-STATE CIRCUITS 43 ( 4 ) 1020 - 1029 2008.4
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C-12-18 A Low Phase Noise CMOS Voltage Controlled Oscillator using a Wafer Level Package Technology
Kobayashi Yuka, Ohashi Kazuma, Ito Hiroyuki, Okada Kenichi, Hatakeyama Hideki, Aizawa Takuya, Ito Tatsuya, Yamauchi Ryozo, Masu Kazuya
Proceedings of the IEICE General Conference 2008 ( 2 ) 108 - 108 2008.3
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C-12-64 A Low Noise Amplifier using Wafer Level Package Technology
Sadoshima Susumu, Ito Hiroyuki, Okada Kenichi, Hatakeyama Hideki, Aizawa Takuya, Ito Tatsuya, Yamauchi Ryozo, Masu Kazuya
Proceedings of the IEICE General Conference 2008 ( 2 ) 154 - 154 2008.3
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C-12-54 A Low-Power On-Chip Pulse Transmission Line Interconnect
Maekawa Tomoaki, Ishii Takahiro, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2008 ( 2 ) 144 - 144 2008.3
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HATAKEYAMA Hideki, OKADA Kenichi, OHASHI Kazuma, ITO Yusaku, UEMICHI Yusuke, OZAWA Naoyuki, SATO Masakazu, AIZAWA Takuya, ITO Tatsuya, YAMAUCHI Ryozo, MASU Kazuya
IEICE technical report 107 ( 481 ) 37 - 40 2008.2
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Reconfigurable RF CMOS circuit for cognitive radio
Kazuya Masu, Kenichi Okada
IEICE TRANSACTIONS ON COMMUNICATIONS E91B ( 1 ) 10 - 13 2008.1
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Reconfigurable RF CMOS circuit for cognitive radio
Kazuya Masu, Kenichi Okada
IEICE Transactions on Communications E91-B ( 1 ) 10 - 13 2008
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A 0.49-6.50GHz Wideband LC-VCO with High-IRR in a 180nm CMOS Technology
KOBAYASHI Yuka, OHASHI Kazuma, ITO Yusaku, ITO Hiroyuki, OKADA Kenichi, MASU Kazuya
2007 268 - 269 2007.9
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C-12-35 Investigation of High FoM Voltage Controlled Oscillator using Wafer Level Chip Scale Package Technology
Ohashi Kazuma, Ito Hiroyuki, Okada Kenichi, Hatakeyama Hideki, Aizawa Takuya, Ito Tatsuya, Yamauchi Ryozo, Masu Kazuya
Proceedings of the Society Conference of IEICE 2007 ( 2 ) 90 - 90 2007.8
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C-12-45 Investigation of On-Chip Transmission Line Interconnect in Wafer Level Chip Scale Package Technology
Mineyama Akiko, Ishii Takahiro, Kimira Makoto, Ito Hiroyuki, Okada Kenichi, Hatakeyama Hideki, Aizawa Takuya, Ito Tatsuya, Yamauchi Ryozo, Masu Kazuya
Proceedings of the Society Conference of IEICE 2007 ( 2 ) 100 - 100 2007.8
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C-12-41 Measurements of a Multi-Drop On-Chip Interconnect using Transmission Lines
Miyashita Kazuya, Kimura Makoto, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2007 ( 2 ) 96 - 96 2007.8
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C-12-28 A Tunable Power Amplifier using Wafer Level Chip Scale Package Technology
Sadoshima Susumu, Yammouch Tackya, Ito Hiroyuki, Okada Kenichi, Masu Kazuya, Hatakeyama Hideki, Aizawa Takuya, Ito Tatsuya, Yamauchi Ryozo
Proceedings of the Society Conference of IEICE 2007 ( 2 ) 83 - 83 2007.8
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C-12-31 A Wideband CMOS Voltage Controlled Oscillator with High-IRR Frequency-Tuning-Range-Extention Circuit
Kobayashi Yuka, Ohashi Kazuma, Ito Yusaku, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2007 ( 2 ) 86 - 86 2007.8
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C-12-43 Transmitters for Low-Power Pulsed Signaling on On-Chip Differential Transmission Line Interconnects
Maekawa Tomoaki, Ishii Takahiro, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2007 ( 2 ) 98 - 98 2007.8
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C-12-27 Investigation of Wide-band Low Noise Amplifier Using Wafer Level Chip Size Package Process
Fukuda Satoshi, Ito Hiroyuki, Okada Kenichi, Masu Kazuya, Hatakeyama Hideki, Aizawa Takuya, Ito Tatsuya, Yamauchi Ryozo
Proceedings of the Society Conference of IEICE 2007 ( 2 ) 82 - 82 2007.8
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Reconfigurable RF CMOS circuit
20 131 - 135 2007.4
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On-chip Yagi-Uda antenna for horizontal wireless signal transmission in stacked multi chip packaging
Kazuma Ohashi, Tackya Yammouch, Makoto Kimura, Hiroyuki Ito, Kenichi Okada, Kazuhisa Itoi, Masakazu Sato, Tatsuya Ito, Ryozo Yamauchi, Kazuya Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 46 ( 4B ) 2283 - 2286 2007.4
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On-chip Yagi-Uda antenna for horizontal wireless signal transmission in stacked multi chip packaging
Kazuma Ohashi, Tackya Yammouch, Makoto Kimura, Hiroyuki Ito, Kenichi Okada, Kazuhisa Itoi, Masakazu Sato, Tatsuya Ito, Ryozo Yamauchi, Kazuya Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 46 ( 4B ) 2283 - 2286 2007.4
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C-2-62 Study of High-Density and High-Speed Printed-Wiring Board using Diagonal-Pair Line Structure
Fu Wanlin, Kimura Makoto, Ito Hiroyuki, Okada Kenichi, Sakai Jun, Masu Kazuya
Proceedings of the IEICE General Conference 2007 ( 1 ) 95 - 95 2007.3
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C-2-98 A Composite Right/Left Handed Transmission Line with Si CMOS Process
Kim Jang-Gu, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2007 ( 1 ) 131 - 131 2007.3
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C-2-61 Wiring capacity and transmission characteristics of PCB using diagonal transmission line
Sakai Jun, Takahashi Hisaya, Fu Wanlin, Kimura Makoto, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2007 ( 1 ) 94 - 94 2007.3
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C-12-27 A 2.7mW/10Gbps On-Chip LVDS-type Transmission Line Interconnect in 90nm CMOS Technology
Ito Hiroyuki, Seita Junki, Ishii Takahiro, Sugita Hideyuki, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2007 ( 2 ) 106 - 106 2007.3
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C-12-20 Investigation of CMOS LC-VCO using Frequency-extension Circuit
Ohashi Kazuma, Ito Yusaku, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2007 ( 2 ) 99 - 99 2007.3
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A-3-10 Investigation of Scaling Effects on On-Chip Differential Transmission Line Using an Asymmetric Tx
Ishii Takahiro, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2007 100 - 100 2007.3
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C-12-16 Investigation of Multiband Low Noise Amplifier Using Variable Inductor
Fukuda Satoshi, Kawazoe Daisuke, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2007 ( 2 ) 95 - 95 2007.3
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Low-loss distributed constant passive devices using wafer-level chip scale package technology
Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Tatsuya Ito, Kazuhisa Itoi, Masakazu Sato, Ryozo Yamauchi, Kazuya Masu
IEICE TRANSACTIONS ON ELECTRONICS E90C ( 3 ) 641 - 643 2007.3
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Low-loss distributed constant passive devices using wafer-level chip scale package technology
Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Tatsuya Ito, Kazuhisa Itoi, Masakazu Sato, Ryozo Yamauchi, Kazuya Masu
IEICE TRANSACTIONS ON ELECTRONICS E90C ( 3 ) 641 - 643 2007.3
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A MOS Transistor-array for Accurate Measurement of Subthreshold Leakage Variation Reviewed
T. Sato, T. Uezono, S. Hagiwara, K. Okada, S. Amakawa, N. Nakayama, K. Masu
International Symposium on Quality Electronic Design (ISQED) 21 - 26 2007.3
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高周波シリコンCMOS送受信システムチップ
益 一哉, 岡田 健一
電子情報通信学会誌 90 ( 4 ) 276 - 282 2007
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Statistical Modeling of a Via Distribution for Yield Estimation
UEZONO Takumi, OKADA Kenichi, MASU Kazuya
IEICE transactions on fundamentals of electronics, communications and computer sciences 89 ( 12 ) 3579 - 3584 2006.12
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A Left Handed Material on Si CMOS Chip With Wafer Level Package Process Reviewed
J. Kim, T. Yammouchi, K. Okada, T. Sato, K. Masu
Asia Pacific Microwave Conference (APMC) 2 1321 - 1324 2006.12
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Statistical modeling of a via distribution for yield estimation
Takumi Uezono, Kenichi Okada, Kazuya Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E89A ( 12 ) 3579 - 3584 2006.12
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Statistical modeling of a via distribution for yield estimation
Takumi Uezono, Kenichi Okada, Kazuya Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E89A ( 12 ) 3579 - 3584 2006.12
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MOSFETのリーク電流ばらつき測定のための回路検討
藤久 雄己, 岡田 健一, 佐藤 高史, 中山 範明, 益 一哉
システムLSIワークショップ 259 - 262 2006.11
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On-Chip Yagi Antenna for Wireless Signal Transmission in Stacked MCP
OHASHI Kazuma, YAMMOUCH Tackya, KIMURA Makoto, ITO Hiroyuki, OKADA Kenichi, ISHIDA Koichi, ITOI Kazuhisa, SATO Masakazu, ITO Tatsuya, MASU Kazuya
2006 68 - 69 2006.9
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Equivalent Circuit Model for On-Chip Variable Inductor
YAMMOUCH Tackya, ISHIDA Koichi, OKADA Kenichi, MASU Kazuya
2006 58 - 59 2006.9
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C-12-38 Investigation of On-Chip Bus using Differential Transmission Line
Kimura Makoto, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 ( 2 ) 99 - 99 2006.9
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C-12-37 Investigation of On-Chip Differential Transmission Line Using CML for High-Speed Global Interconnect
Ishii Takahiro, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 ( 2 ) 98 - 98 2006.9
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C-12-25 Investigation of Wideband Low Noise Amplifier Using Capacitive Feedback
Fukuda Satoshi, Kawazoe Daisuke, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 ( 2 ) 86 - 86 2006.9
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A-3-15 On-Chip Differential-Transmission-Line(DTL) Interconnect for 22nm Technology
Okada Kenichi, Ito Hiroyuki, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 59 - 59 2006.9
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C-12-26 Investigation of Tunable Low Noise Amplifier Using Variable Inductor
Kawazoe Daisuke, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 ( 2 ) 87 - 87 2006.9
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A-3-18 Wireless Interconnection using On-chip Directional Antenna in Package
Ohashi Kazuma, Yammouch Tackya, Kimura Makoto, Ito Hiroyuki, Okada Kenichi, Itoi Kazuhisa, Sato Masakazu, Ito Tatsuya, Yamauchi Ryozo, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 62 - 62 2006.9
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A-3-17 Loss Investigation Using WD Product for On-Chip Differential Transimission Lines
Fu Wanlin, Ito Hiroyuki, Kimura Makoto, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 61 - 61 2006.9
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C-12-27 Small-Area CMOS RF Distributed Mixer
Yammouch Tackya, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 ( 2 ) 88 - 88 2006.9
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C-12-30 Investigation of CMOS Wide-band VCO using Frequency-extension Circuit
Ito Yusaku, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 ( 2 ) 91 - 91 2006.9
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C-12-21 Investigation of in-vivo Batteryless Wireless Communication Circuit
Kobayashi Yuka, Ishida Koichi, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2006 ( 2 ) 82 - 82 2006.9
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MOSFETのリーク電流ばらつき測定のための回路検討
藤久 雄己, 上園 巧, 萩原 汐, 岡田 健一, 佐藤 高史, 中山 範明, 益 一哉
電子情報通信学会 ソサイエティ大会 ( A-3-22 ) 66 - 66 2006.9
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伝送線路を用いたオンチップ高速伝送回路の研究
清田 淳紀, 伊藤 浩之, 岡田 健一, 佐藤 高史, 益 一哉
電子情報通信学会 ソサイエティ大会 ( A-3-16 ) 60 - 60 2006.9
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On-chip high-Q variable inductor using wafer-level chip-scale package technology
Kenichi Okada, Hirotaka Sugawara, Hiroyuki Ito, Kazuhisa Itoi, Masakazu Sato, Hiroshi Abe, Tatsuya Ito, Kazuya Masu
IEEE TRANSACTIONS ON ELECTRON DEVICES 53 ( 9 ) 2401 - 2406 2006.9
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On-chip high-Q variable inductor using wafer-level chip-scale package technology
Kenichi Okada, Hirotaka Sugawara, Hiroyuki Ito, Kazuhisa Itoi, Masakazu Sato, Hiroshi Abe, Tatsuya Ito, Kazuya Masu
IEEE TRANSACTIONS ON ELECTRON DEVICES 53 ( 9 ) 2401 - 2406 2006.9
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Si CMOSチップにおける右手・左手系伝送線路の検討
金 章九, 山内 拓弥, 岡田 健一, 佐藤 高史, 益 一哉
電子情報通信学会 ソサイエティ大会 ( C-12-36 ) 97 - 97 2006.9
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Multi-Standard Wireless Circuit Using Reconfigurable Technique
YAMMOUCH Tackya, KAWAZOE Daisuke, ITO Yusaku, OKADA Kenichi, MASU Kazuya
IEICE technical report 106 ( 188 ) 51 - 58 2006.7
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Design of Reconfigurable RF CMOS Wireless Circuit
OKADA Kenichi, YOSHIHARA Yoshiaki, SUGAWARA Hirotaka, MASU Kazuya
The IEICE transactions on electronics C 89 ( 7 ) 499 - 507 2006.7
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Improvement of variable ratio of on-chip variable inductors using side shield
Tackya Yammouch, Hirotaka Sugawara, Kenichi Okada, Kazuya Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 45 ( 7 ) 5720 - 5723 2006.7
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Improvement of variable ratio of on-chip variable inductors using side shield
Tackya Yammouch, Hirotaka Sugawara, Kenichi Okada, Kazuya Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 45 ( 7 ) 5720 - 5723 2006.7
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Zero-crosstalk bus line structure for global interconnects in Si ultra large scale integration
M Kimura, H Ito, H Sugita, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 45 ( 6A ) 4977 - 4981 2006.6
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Zero-crosstalk bus line structure for global interconnects in Si ultra large scale integration
M Kimura, H Ito, H Sugita, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 45 ( 6A ) 4977 - 4981 2006.6
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Optimization methodology of layer numbers with circuit/process co-design
T Kyogoku, J Inoue, H Nakashima, T Uezono, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 45 ( 4A ) 2476 - 2480 2006.4
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Optimization methodology of layer numbers with circuit/process co-design
T Kyogoku, J Inoue, H Nakashima, T Uezono, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 45 ( 4A ) 2476 - 2480 2006.4
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C-12-22 Equivalent Circuit Model for On-Chip Variable Inductor
Yammouch Tackya, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2006 ( 2 ) 94 - 94 2006.3
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C-12-29 Power Reduction Technique for Si CMOS RF Distributed Amplifier
Ito Takeshi, Sugawara Hirotaka, Kawazoe Daisuke, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2006 ( 2 ) 101 - 101 2006.3
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C-12-27 Investigation of Low Phase Noise VCO Using Wafer Level Chip Scale Package Technology
Ito Yusaku, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2006 ( 2 ) 99 - 99 2006.3
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C-2-48 Study of Directional Coupler for One-Chip Wireless Communication Circuits with WL-CSP
Seita Junki, Ito Hiroyuki, Sugita Hideyuki, Okada Kenichi, Ito Tatsuya, Itoi Kazuhisa, Sato Masakazu, Masu Kazuya
Proceedings of the IEICE General Conference 2006 ( 1 ) 79 - 79 2006.3
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C-12-28 Investigation of Self Compensation Technique for Low Noise Amplifier
Kawazoe Daisuke, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2006 ( 2 ) 100 - 100 2006.3
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A-3-12 Via Distribution Model for Yield Estimation
Uezono Takumi, Kyogoku Takanori, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2006 76 - 76 2006.3
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WLP技術によるオンチップ受動部品の形成
糸井 和久, 佐藤 正和, 阿部 博史, 相沢 卓也, 岡田 健一, 益 一哉, 伊藤 達也
日本応用磁気学会会報 1 ( 5 ) 203 - 207 2006
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A-3-15 Crosstalk Evaluation of Twisted Differential Transmission Line in Si LSI
Kimura Makoto, Ito Hiroyuki, Sugita Hideyuki, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 79 - 79 2006
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益 一哉, 岡田 健一, 伊藤 浩之
エレクトロニクス実装学会誌 9 ( 5 ) 342 - 346 2006
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Evaluation of X Architecture Using Interconnect Length Distribution
NAKASHIMA Hidenori, TAKAGI Naohiro, INOUE Junpei, OKADA Kenichi, MASU Kazuya
IEICE transactions on fundamentals of electronics, communications and computer sciences 88 ( 12 ) 3437 - 3444 2005.12
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Evaluation of X architecture using interconnect length distribution
H Nakashima, N Takagi, J Inoue, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 12 ) 3437 - 3444 2005.12
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Wire length distribution model for system LSI
T Kyogoku, J Inoue, H Nakashima, T Uezono, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 12 ) 3445 - 3452 2005.12
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Wire length distribution model for system LSI
T Kyogoku, J Inoue, H Nakashima, T Uezono, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 12 ) 3445 - 3452 2005.12
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Circuit performance prediction considering core utilization with interconnect length distribution model
H Nakashima, J Inoue, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 12 ) 3358 - 3366 2005.12
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Evaluation of X architecture using interconnect length distribution
H Nakashima, N Takagi, J Inoue, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 12 ) 3437 - 3444 2005.12
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Circuit performance prediction considering core utilization with interconnect length distribution model
H Nakashima, J Inoue, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 12 ) 3358 - 3366 2005.12
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A Large Variable Ratio On-Chip Inductor with Spider Legs Shield
YAMMOUCH Tackya, SUGAWARA Hirotaka, OKADA Kenichi, MASU Kazuya
2005 652 - 653 2005.9
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Zero-Crosstalk Bus Line Structure for Global Interconnects in Si ULSI
KIMURA Makoto, ITO Hiroyuki, SUGITA Hideyuki, OKADA Kenichi, MASU Kazuya
2005 936 - 937 2005.9
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On Chip Transmission Line Interconnect
MASU Kazuya, OKADA Kenichi, ITO Hiroyuki
Technical report of IEICE. ICD 105 ( 268 ) 47 - 52 2005.9
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C-12-37 Comparison of Operation Mode for Symmetric Inductor
Sugawara Hirotaka, Okada Kenichi, Nishikawa Kazuyasu, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 ( 2 ) 117 - 117 2005.9
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C-12-38 On-Chip Variable Transformer with MEMS Actuators
Yammouch Tackya, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 ( 2 ) 118 - 118 2005.9
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C-12-36 Investigation of Wide-Band RF Oscillator using VCO and Divider
Ito Yusaku, Yoshihara Yoshiaki, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 ( 2 ) 116 - 116 2005.9
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C-12-34 Design of Si RF CMOS Distributed Amplifier
Ito Takeshi, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 ( 2 ) 114 - 114 2005.9
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A-3-8 On-Chip Multi-Drop Bus Using Transmission Line
Seita Junki, Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 67 - 67 2005.9
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A-3-10 On-chip High-density Transmission Line Using Pseudo Differential Transmission Line
Sugita Hideyuki, Ito Hiroyuki, Kimura Makoto, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 69 - 69 2005.9
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C-12-35 Investigation of Compansation for Reconfigurable LNA Performance Using Variable Bias Circuit
Kawazoe Daisuke, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 ( 2 ) 115 - 115 2005.9
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A-3-7 High-Frequency Characteristics of On-Chip Transmission Line with Bending and Vias
Ito Hiroyuki, Sugita Hideyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 66 - 66 2005.9
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A-3-9 High-Speed and High-Density On Chip Bus Line using Transmission Line
Kimura Makoto, Ito Hiroyuki, Sugita Hideyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2005 68 - 68 2005.9
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Reconfigurable RF CMOS Circuit Using On-Chip MEMS Variable Inductor
OKADA Kenichi, SUGAWARA Hirotaka, MASU Kazuya
IEICE technical report. Electron devices 105 ( 257 ) 45 - 50 2005.9
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Design of Reconfigurable RF CMOS Wireless Circuit
OKADA Kenichi, SUGAWARA Hirotaka, MASU Kazuya
IEICE technical report 105 ( 217 ) 97 - 103 2005.7
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RF attenuation characteristics for in vivo wireless healthcare chip
T Yamada, T Uezono, K Okada, K Masu, A Oki, Y Horiike
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 7A ) 5275 - 5277 2005.7
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RF attenuation characteristics for in vivo wireless healthcare chip
T Yamada, T Uezono, K Okada, K Masu, A Oki, Y Horiike
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 7A ) 5275 - 5277 2005.7
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Small-area inductor for silicon CMOS chips
H Sugawara, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 4B ) 2766 - 2769 2005.4
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In vivo batteryless wireless communication system for bio-MEMS sensors
T Yamada, T Uezono, K Okada, K Masu, A Oki, Y Horiike
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 4B ) 2879 - 2882 2005.4
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In vivo batteryless wireless communication system for bio-MEMS sensors
T Yamada, T Uezono, K Okada, K Masu, A Oki, Y Horiike
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 4B ) 2879 - 2882 2005.4
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Twisted differential transmission line structure for global interconnect in Si LSI
H Ito, S Gomi, H Sugita, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 4B ) 2774 - 2779 2005.4
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Small-area inductor for silicon CMOS chips
H Sugawara, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 4B ) 2766 - 2769 2005.4
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Twisted differential transmission line structure for global interconnect in Si LSI
H Ito, S Gomi, H Sugita, K Okada, K Masu
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 4B ) 2774 - 2779 2005.4
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A-3-9 Layout area allocation for SoC considering core utilization
Kyogoku Takanori, Inoue Junpei, Uezono Takumi, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2005 74 - 74 2005.3
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AT-2-4 Si device characteristics for analog and RF circuits
Okada Kenichi, Onodera Hidetoshi, Masu Kazuya
Proceedings of the IEICE General Conference 2005 "SS - 25"-"SS-26" 2005.3
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C-12-30 Wide-tunable CMOS LNA for Recinfigurable RF Circuit
Sugawara Hirotaka, Yoshihara Yoshiaki, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2005 ( 2 ) 93 - 93 2005.3
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A-3-10 Prediction of Delay Time for Future LSI Using On-Chip Transmission Line Interconnects
Uezono Takumi, Inoue Junpei, Kyogoku Takanori, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2005 75 - 75 2005.3
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A-3-11 Measurement and evaluation for Pseudo Differential Transmission Line on Si ULSI
Sugita Hideyuki, Ito Hiroyuki, Gomi Shinichiro, Okada Kenichi, Masu Kazuya
Proceedings of the IEICE General Conference 2005 76 - 76 2005.3
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C-2-61 Directional Coupler in Wafer-Level Chip Scale Package
Ito Hiroyuki, Okada Kenichi, Ito Tatsuya, Sato Masakazu, Masu Kazuya
Proceedings of the IEICE General Conference 2005 ( 1 ) 94 - 94 2005.3
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Wide tuning range LC-VCO using variable inductor for reconfigurable RF circuit
Y Yoshihara, H Sugawara, H Ito, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 2 ) 507 - 512 2005.2
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Wide tuning range LC-VCO using variable inductor for reconfigurable RF circuit
Y Yoshihara, H Sugawara, H Ito, K Okada, K Masu
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E88A ( 2 ) 507 - 512 2005.2
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On-Chip Transmission Line for Long Global Interconnects
ITO Hiroyuki, INOUE Junpei, GOMI Shinichiro, SUGITA Hideyuki, OKADA Kenichi, MASU Kazuya
Technical report of IEICE. SDM 104 ( 645 ) 1 - 6 2005.1
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Statistical parameter extraction for intra- and inter-chip variabilities of metal-oxide-semiconductor field-effect transistor characteristics
K Okada, H Onodera
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 ( 1A ) 131 - 134 2005.1
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受動素子内蔵ウエハレベルパッケージ
益一哉, 岡田健一, 糸井和久, 佐藤正和, 阿部博史, 伊藤達也
フジクラ技報 ( 108 ) 52 - 55 2005
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エリクソン・ヤング・サイエンティスト・アワード受賞報告
岡田健一
東工大クロニクル ( 396 ) 3 - 4 2005
-
Statistical Parameter Extraction for Intra- and Inter-chip Variabilities of Metal-Oxide-Semiconductor Field-Effect Transistor Characteristics
Kenichi Okada, Hidetoshi Onodera
Japanese Journal of Applied Physics 44 ( 1A ) 131 - 134 2005
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Optimization Technique of Number of Interconnect Layers and Circuit Area Based on Wire Length Distribution
KYOGOKU Takanori, INOUE Junpei, NAKASHIMA Hidenari, OKADA Kenichi, MASU Kazuya
2004 474 - 475 2004.9
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On-chip Spiral Inductors Integrated with Wafer-Level Package
SATO Masakazu, ITOI Kazuhisa, ABE Hiroshi, SUGAWARA Hirotaka, ITO Hiroyuki, OKADA Kenichi, MASU Kazuya, ITO Tatsuya
2004 286 - 287 2004.9
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Twisted Differential Transmission Line Structure for EMI Noise Reduction at Global Interconnect in Si LSI
ITO Hiroyuki, GOMI Shinichiro, SUGITA Hideyuki, OKADA Kenichi, MASU Kazuya
2004 290 - 291 2004.9
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High density differential transmisson line structure on SiULSI
H Ito, K Okada, K Masu
IEICE TRANSACTIONS ON ELECTRONICS E87C ( 6 ) 942 - 948 2004.6
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High density differential transmisson line structure on SiULSI
H Ito, K Okada, K Masu
IEICE TRANSACTIONS ON ELECTRONICS E87C ( 6 ) 942 - 948 2004.6
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Design optimization methodology for on-chip spiral inductors
K Okada, H Hoshino, H Onodera
IEICE TRANSACTIONS ON ELECTRONICS E87C ( 6 ) 933 - 941 2004.6
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Design optimization methodology for on-chip spiral inductors
K Okada, H Hoshino, H Onodera
IEICE TRANSACTIONS ON ELECTRONICS E87C ( 6 ) 933 - 941 2004.6
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Variable RF inductor on SiCMOS chip
H Sugawara, Y Yokoyama, S Gomi, H Ito, K Okada, H Hoshino, H Onodera, K Maso
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS 43 ( 4B ) 2293 - 2296 2004.4
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Variable RF inductor on SiCMOS chip
H Sugawara, Y Yokoyama, S Gomi, H Ito, K Okada, H Hoshino, H Onodera, K Maso
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS 43 ( 4B ) 2293 - 2296 2004.4
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C-2-48 On-Chip High-Q Inductors Embedded In Wafer-Level Chip-Scale Package
Sato Masakazu, Itoi Kazuhisa, Abe Hiroshi, Ito Hiroyuki, Sugawara Hirotaka, Okada Kenichi, Masu Kazuya, Ito Tatsuya
Proceedings of the IEICE General Conference 2004 ( 1 ) 83 - 83 2004.3
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樹脂基板内RFスパイラルインダクタの評価
伊藤浩之, 菅原弘雄, 岡田健一, 島田靖, 大島俊之, 益一哉
エレクトロニクス実装学術講演大会 123 - 124 2004
-
Dynamic Reconfigurable RF Circuit Design
Kenichi Okada, Yoshiaki Yoshihara Hirotaka Sugawara, Kazuya Masu
The Workshop on Synthesis And System Integration of Mixed Information Technologies 451 - 457 2004
-
Wide-Range RF Variable Inductor on Si CMOS Chip with MEMS Actuator
Hirotaka Sugawara, Yoshiaki Yoshihara Hiroyuki Ito Kenichi, Okada, Kazuya Masu
IEEE European Microwave Conference 701 - 704 2004
-
Optimization Methodology of Global Interconnect Structure
Junpei Inoue, Hidenari, Nakashima Takanori, Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu
International Conference on Microelectronics 351 - 354 2004
-
High Speed and Low Power On-Chip Micro Network Circuit with Differential Transmission Line
Shinichiro Gomi, Kohichi Nakamura Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Kazuya Masu
IEEE International Symposium on System-on-Chip 173 - 176 2004
-
High-Speed Transmission Circuit for Micro-Network on Si ULSI
Shinichiro Gomi, Kohichi Nakamura Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Kazuya Masu
International Conference on Solid State Devices and Materials 308 - 309 2004
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A Wide Tuning Range CMOS VCO using Variable Inductor
Yoshiaki Yoshihara Hirotaka Sugawara Hiroyuki Ito Kenichi, Okada, Kazuya Masu
IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems 278 - 281 2004
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Differential Transmission Line Interconnect for High Speed and Low Power Global Wiring
Shinichiro Gomi, Kohichi Nakamura Hiroyuki, Ito Kenichi, Okada, Kazuya Masu
IEEE Custom Integrated Circuits Conference 325 - 328 2004
-
Small Area Snake Inductor on Si RF CMOS Chip
Hirotaka Sugawara, Kenichi Okada, Kazuya Masu
International Conference on Solid State Devices and Materials 288 - 289 2004
-
High-Q variable inductor using redistributed layers for Si RF circuits
H Sugawara, H Ito, K Okada, K Itoi, M Sato, H Abe, T Ito, K Masu
2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Digest of Papers 187 - 190 2004
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Differential transmission line structure for over 10 Gbps signal transmission at global interconnect in SiULSI
H Ito, S Gomi, H Sugita, K Okada, K Masu
PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS 414 - 415 2004
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High speed and low power on-chip micro network circuit with differential transmission line
S Gomi, K Nakamura, H Ito, H Sugita, K Okada, K Masu
2004 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS 173 - 176 2004
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Battery-less wireless communication system through human body for in-vivo healthcare chip
T Yamada, T Uezono, H Sugawara, K Okada, K Masu, A Oki, Y Horiike
2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Digest of Papers 322 - 325 2004
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Wide-range RF variable inductor on Si CMOS chip with MEMS actuator
H Sugawara, Y Yoshihara, H Ito, K Okada, K Masu
34TH EUROPEAN MICROWAVE CONFERENCE, VOLS 1-3, CONFERENCE PROCEEDINGS 2 701 - 704 2004
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High speed and low power globel interconnect IP with differential transmission line and driver-receiver circuits
S Gomi, K Nakamura, H Ito, K Okada, K Masu
PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS 384 - 387 2004
-
Pseudo differential transmission line structure on SiULSI
H Sugita, H Ito, S Gomi, K Okada, K Masu
ADVANCED METALLIZATION CONFERENCE 2004 (AMC 2004) 165 - 170 2004
-
On-chip high-Q solenoid inductors embedded in WL-CSP
K Itoi, M Sato, H Abe, H Ito, H Sugawara, K Okada, K Masu, T Ito
PROCEEDINGS OF THE SIXTH IEEE CPMT CONFERENCE ON HIGH DENSITY MICROSYSTEM DESIGN AND PACKAGING AND COMPONENT FAILURE ANALYSIS (HDP'04) 105 - 108 2004
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ULSI interconnect length distribution model considering core utilization
H Nakashima, J Inoue, K Okada, K Masu
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS 2 1210 - 1215 2004
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Near field communication chip using PIM for bio MEMS sensors
K Okada, T Yamada, T Uezono, K Masu, A Oki, Y Horiike
PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS 440 - 441 2004
-
A wide tuning range CMOS VCO using variable inductor
Y Yoshihara, H Sugawara, H Ito, K Okada, K Masu
2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Digest of Papers 278 - 281 2004
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Differential transmission line interconnect for high speed and low power global wiring
S Gomi, K Nakamura, H Ito, K Okada, K Masu
PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE 325 - 328 2004
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Reconfigurable RF circuit design for multi-band wireless chip
Y Yoshihara, H Sugawara, H Ito, K Okada, K Masu
PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS 418 - 419 2004
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in vivo ワイヤレス通信チップ用送受信回路に関する研究
山田智浩, 菅原弘雄, 岡田健一, 沖明男, 益一哉, 堀池靖浩
電子情報通信学会 総合大会 B-5-145 2004
-
Reconfigurable RF Circuit Design for Multi-band Wireless Chip
Yoshiaki Yoshihara Hirotaka Sugawara Hiroyuki Ito Kenichi, Okada, Kazuya Masu
IEEE Asia-Pacific Conference on Advanced System Integrated Circuits Designer Forum 418 - 419 2004
-
Wide Tunable LC-VCO using Variable Inductor
Yoshiaki Yoshihara Hirotaka Sugawara Hiroyuki Ito Kenichi, Okada, Kazuya Masu
IEEE Workshop on Wireless Circuits and Systems 29 - 30 2004
-
配線長分布によるセル配置効率の最適化手法
井上淳平, 中島英斉, 岡田健一, 益一哉
情報処理学会 DA シンポジウム論文集 2004 ( 8 ) 127 - 132 2004
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高速信号伝送に適したオンチップ差動伝送線路構造
伊藤浩之, 五味振一郎, 杉田英之, 岡田健一, 益一哉
STARCシンポジウム 2004
-
Modeling for Variable RF Inductor on Si CMOS Chip
Hirotaka Sugawara, Hiroyuki, Ito Kenichi, Okada, Kazuya Masu
International Workshop on Compact Modeling 24 - 28 2004
-
Si ULSI内の高速信号伝送に適した差動伝送線路構造に関する検討
伊藤浩之, 岡田健一, 益一哉
情報処理学会 DA シンポジウム論文集 2004 ( 8 ) 271 - 276 2004
-
配線長分布を用いたオンチップ伝送線路の性能評価
井上淳平, 伊藤浩之, 京極貴規, 上薗巧, 岡田健一, 益一哉
電子情報通信学会 ソサイエティ大会 A-3-2 2004
-
Si ULSIにおける擬差動伝送線路構造
杉田英之, 伊藤浩之, 五味振一郎, 岡田健一, 益一哉
電子情報通信学会 ソサイエティ大会 A-3-3 2004
-
オンチップ差動伝送線路を用いた高速信号伝送回路
五味振一郎, 伊藤浩之, 杉田英之, 岡田健一, 益一哉
STARCシンポジウム 2004
-
回路規模と配線層数を考慮した回路とプロセスの協調設計手法
京極貴規, 井上淳平, 中島英斉, 岡田健一, 益一哉
電子情報通信学会 ソサイエティ大会 A-3-1 2004
-
High speed and low power global Interconnect IP with differential transmission line and driver-receiver circuits
Shinichiro Gomi, Kohichi Nakamura, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits 384 - 387 2004
-
可変インダクタを用いた広帯域CMOS VCOの設計
吉原義昭, 菅原弘雄, 伊藤浩之, 岡田健一, 益一哉
電子情報通信学会 総合大会 C-12-28 2004
-
Inductance-tuned LC-VCO for reconfigurable RF circuit design
Yoshiaki Yoshihara, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
IEICE Electronics Express 1 ( 7 ) 156 - 159 2004
-
Inductance-tuned LC-VCO for reconfigurable RF circuit design
Yoshiaki Yoshihara, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
IEICE Electronics Express 1 ( 7 ) 156 - 159 2004
-
MEMSを用いたRF可変インダクタのモデル化手法
菅原弘雄, 伊藤浩之, 岡田健一, 益一哉
電子情報通信学会 総合大会 C-12-31 2004
-
ウェハレベルパッケージ内蔵高性能オンチップインダクタ
佐藤正和, 糸井和久, 阿部博史, 伊藤浩之, 菅原弘雄, 岡田健一, 益一哉, 伊藤達也
電子情報通信学会 総合大会 C-12-48 2004
-
シリコン上の高周波受動素子技術
益一哉, 岡田健一
応用物理 73 ( 9 ) 1172 - 1178 2004
-
リコンフィギュラブルＲＦ回路設計技術に関する研究
岡田健一, 吉原義昭, 菅原弘雄, 伊藤浩之, 益一哉
電子情報通信学会シリコンアナログRF研究会 RF2004-1 1 2004
-
Si CMOSチップ上に作成した差動伝送線路のアイパターン測定
伊藤浩之, 岡田健一, 益一哉
電子情報通信学会シリコンアナログRF研究会 RF2004-1 1 2004
-
広帯域RF回路の設計アプローチ -広帯域マッチングネットワーク-
菅原弘雄, 岡田健一, 益一哉
電子情報通信学会シリコンアナログRF研究会 RF2004-2 1 2004
-
高周波インダクタ内蔵ウェハレベルパッケージ
伊藤達也, 佐藤正和, 糸井和久, 阿部博史, 菅原弘雄, 伊藤浩之, 岡田健一, 益一哉
エレクトロニクス実装学会 超高速高周波エレクトロニクス実装研究会 4 ( 1 ) 7 - 8 2004
-
配線長分布を用いた65nmプロセスにおける配線構造最適化手法
井上淳平, 中島英斉, 岡田健一, 益一哉
電子情報通信学会 総合大会 A-3-21 2004
-
Si ULSI内差動伝送線路の時間領域測定による評価
伊藤浩之, 岡田健一, 益一哉
電子情報通信学会 総合大会 A-3-23 2004
-
Si CMOSチップ内差動伝送線路の時間領域測定による評価
伊藤浩之, 岡田健一, 益一哉
2004年春季 第50回 応用物理学会 関係連合講演会 28a-ZH-3 2004
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配線長分布を用いた65nmプロセスにおける配線構造の最適化
井上淳平, 中島英斉, 岡田健一, 益一哉
2004年春季 第50回 応用物理学会 関係連合講演会 28a-P2-18 2004
-
Si ULSIにおけるGHz帯差動伝送線路駆動受端回路の設計
五味振一郎, 中村恒一, 伊藤浩之, 岡田健一, 益一哉
電子情報通信学会 総合大会 A-3-24 2004
-
配線長分布を用いたLSIの配線層数と回路面積の最適化
京極貴規, 井上淳平, 中島英斉, 岡田健一, 益一哉
2004年秋季 第65回 応用物理学会 学術講演会 3p-M-22 2004
-
服用型バッテリーレス無線送受信システムの設計
山田智浩, 上薗巧, 岡田健一, 沖明男, 益一哉, 堀池靖浩
電子情報通信学会 ソサイエティ大会 C-12-20 2004
-
GHz帯広帯域PLL向け発振器及び分周器についての検討
吉原義昭, 菅原弘雄, 伊藤浩之, 岡田健一, 益一哉
電子情報通信学会 ソサイエティ大会 C-12-23 2004
-
Si LSIにおける縒り合わせ差動伝送線路を用いたEMI低減手法
伊藤浩之, 五味振一郎, 杉田英之, 岡田健一, 益一哉
電子情報通信学会 ソサイエティ大会 A-3-4 2004
-
省面積Siオンチップスネーク型インダクタ
菅原弘雄, 岡田健一, 益一哉
2004年秋季 第65回 応用物理学会 学術講演会 3a-L-4 2004
-
Si CMOS チップにおけるEMI 低減のための縒り合わせ差動伝送線路構造
伊藤浩之, 五味振一郎, 杉田英之, 岡田健一, 益一哉
2004年秋季 第65回 応用物理学会 学術講演会 3a-L-8 2004
-
オンチップ可変インダクタを用いた広帯域マッチングネットワーク
菅原弘雄, 吉原義昭, 岡田健一, 益一哉
電子情報通信学会 ソサイエティ大会 C-12-24 2004
-
オンチップマイクロネットワーク通信の実現に向けた高速信号伝送線路配線駆動回路の設計
五味振一郎, 中村恒一, 伊藤浩之, 杉田英之, 岡田健一, 益一哉
電子情報通信学会 ソサイエティ大会 C-12-25 2004
-
リコンフィギュラブルRF回路設計技術(招待講演)
岡田健一, 吉原義昭, 吉原義昭, 益一哉
VDEC デザイナーフォーラム 2004
-
Si ULSI内における擬差動伝送線路構造の検討
杉田英之, 伊藤浩之, 五味振一郎, 岡田健一, 益一哉
2004年秋季 第65回 応用物理学会 学術講演会 3a-L-9 2004
-
Statistical gate-delay modeling with intra-gate variability
K Okada, K Yamaoka, H Onodera
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E86A ( 12 ) 2914 - 2922 2003.12
-
Statistical gate-delay modeling with intra-gate variability
K Okada, K Yamaoka, H Onodera
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E86A ( 12 ) 2914 - 2922 2003.12
-
Wideband LC-VCO with Dynamic Reconfiguration
YOSHIHARA Yoshiaki, SUGAWARA Hirotaka, ITO Hiroyuki, OKADA Kenichi, MASU Kazuya
Technical report of IEICE. VLD 103 ( 476 ) 247 - 251 2003.11
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Wideband LC - VCO with Dynamic Reconfiguration
YOSHIHARA Yoshiaki, SUGAWARA Hirotaka, ITOU Hiroyuki, OKADA Kenichi, MASU Kazuya
2003 ( 120 ) 277 - 281 2003.11
-
Design of wide-band LC-VCO using on-chip variable inductor
Yoshihara Y., Sugawara H., Gomi S., Okada K., Masu K.
Proceedings of the Society Conference of IEICE 2003 ( 2 ) 89 - 89 2003.9
-
ULSI Interconnect Length Distribution Using Core Utilization
Nakashima Hidenari, Inoue Junpei, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2003 54 - 54 2003.9
-
Study of in vivo Wireless Communication Chip Antenna : Transmission Characteristics of Electromagnetic Wave
Yamada Tomohiro, Uesugi Hisashi, Okada Kenichi, Oki Akio, Masu Kazuya, Horiike Yasuhiro
Proceedings of the Society Conference of IEICE 2003 ( 1 ) 16 - 16 2003.9
-
Wideband Bus Structure Using Differential Transmission Line on Si ULSI
Ito Hiroyuki, Okada Kenichi, Masu Kazuya
Proceedings of the Society Conference of IEICE 2003 55 - 55 2003.9
-
Realistic delay calculation based on measured intra-chip and inter-chip variabilities with the size dependence
K Okada, H Onodera
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E86A ( 4 ) 746 - 751 2003.4
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Realistic delay calculation based on measured intra-chip and inter-chip variabilities with the size dependence
K Okada, H Onodera
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E86A ( 4 ) 746 - 751 2003.4
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CMOS論理ゲートにおける統計的遅延モデル化手法
岡田健一, 山岡健人, 小野寺秀俊
情報処理学会関西支部支部大会 109 - 110 2002.11
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Statistical Characterization of Gate Delay with Intra-Chip Variability
K. Yamaoka, K. Okada, H. Onodera
Proc. IEICE General Conference ( A-3-2 ) 81 2002.3
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A Statistical Timing Analysis with Intra-Chip Manufacturing Variability
K. Okada, H. Onodera
Proc. IEICE General Conference ( A-3-1 ) 80 2002.3
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Statistical Modeling of MOS Transistors with Intra-chip Variability
Kenichi Okada, Hidetoshi Onodera
IPSJ Transactions 43 ( 5 ) 1330 - 1337 2002
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トランジスタ特性におけるチップ内ばらつきのモデル化手法
岡田健一, 小野寺秀俊
情報処理学会論文誌 43 ( 5 ) 1330 - 1337 2002
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A Statistical Timing Analysis with Intra-Chip Manufacturing Valiability
OKADA Kenichi, FUJITA Tomohiro, ONODERA Hidetoshi
Technical report of IEICE. VLD 101 ( 468 ) 7 - 12 2001.11
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Statistical Modeling of Device Characteristics with Intra-Chip Variability
K. Okada, H. Onodera
Proceedings of the 2001 Engineering Sciences Society Conference of IEICE ( A-3-4 ) 58 - 58 2001.9
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Statistical modeling of device characteristics with systematic variability
K Okada, H Onodera
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E84A ( 2 ) 529 - 536 2001.2
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Statistical modeling of device characteristics with systematic variability
K Okada, H Onodera
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E84A ( 2 ) 529 - 536 2001.2
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Layout dependent matching analysis of CMOS circuits
K Okada, H Onodera, K Tamaru
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 25 ( 3 ) 309 - 318 2000.12
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Layout dependent matching analysis of CMOS circuits
K Okada, H Onodera, K Tamaru
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 25 ( 3 ) 309 - 318 2000.12
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Modeling Systematic Fluctuation for Statistical Analysis
Kennichi OKADA, Hidetoshi ONODERA
Proc. IEICE Society Conference A-3-5 - A-3-5 1999.9
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Layout Dependent Matching Analysis of CMOS Circuits
OKADA Kenichi, ONODERA Hidetoshi, TAMARU Keikichi
IEICE Trans. Fundamentals 82 ( 2 ) 348 - 355 1999.2
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Layout dependent matching analysis of CMOS circuits
K Okada, H Onodera, K Tamaru
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E82A ( 2 ) 348 - 355 1999.2
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Modeling Global Fluctuation for Matching Analysis of CMOS Circuits
OKADA Kennichi, ONODERA Hidetoshi, TAMARU Keikichi
Proceedings of the Society Conference of IEICE 1998 38 - 38 1998.9
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Matching Analysis of CMOS Circuits with Layout Information
OKADA Kennichi, ONODERA Hidetoshi, TAMARU Keikichi
Proceedings of the Society Conference of IEICE 1997 70 - 70 1997.8
Presentations
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A High-Power-Density D-Band Phased-Array Transceiver in 65nm CMOS for 6G UE Module International conference
Yudai Yamazaki, Park Sunghwan, Takaya Uchino, Chenxin Liu, Kenichi Okada
IEEE International Solid-State Circuits Conference (ISSCC) Student Research Preview, 2025.2
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A Fractional-N Digital PLL with Analog Pre-Distortion DTC and Stochastic-Carry Dither Achieving -65.7dBc Fractional Spurs International conference
Daxu Zhang, Dingxin Xu, Zezheng Liu, Hiroyuki Sakai, Kenichi Okada
IEEE International Solid-State Circuits Conference (ISSCC) Student Research Preview, 2025.2
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A Ka-Band 8-Stream Phased-Array Receiver with Time-Hopping Blocker Aliasing Rejection for 6G Applications International conference
Minzhe Tang, Yi Zhang, Dongfan Xu, Yuxuan Liu, Zheng Li, Yilun Chen, Minghao Fan, Dingxin Xu, Advisor, Kazuaki Kunihiro, Kenichi Okada
IEEE International Solid-State Circuits Conference (ISSCC) Student Research Preview, 2025.2
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Foldable Phased-Array Transceivers for Satellite Communications Invited International conference
Kenichi Okada
2025 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE FORUM 2025.2
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Sub-THz CMOS Phased-Array Transceiver Design in CMOS for 6G Invited International conference
Kenichi Okada
EuCNC＆6G Summit 6G Series Workshop by Hexa-X-II 2025.2
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A 80GHz Voltage Controlled Oscillator With a Negative Varactor in 90nm CMOS Technology
IEEE Asian Solid-State Circuits Conference 2008
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A Low Phase Noise LC-VCO with a High-Q Inductor Fabricated by Wafer Level Package Technology
Radio Frequency Integrated Circuits Symposium 2008 (RFIC 2008) 2008
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A 2-GHz-band CMOS Low Noise Amplifier with High-Q Inductors Embedded in Wafer-Level Package
International Conference on Solid State Devices and Materials (SSDM) 2008
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LVDS-type On-Chip Transmision Line Interconnect with Passive Equalizers in 90 nm CMOS Process
IEEE/ACM Asia and South Pacific Design Automation Conference (Design Contest) 2008
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Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors
IEEE/ACM Asia and South Pacific Design Automation Conference (Design Contest) 2008
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Numerical Analysis of Asymmetric Differential Inductors
IEEE Asia-Pacific Microwave Conference 2008
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A Three-Stage 60GHz CMOS LNA Using Dual Noise-Matching Technique for 5dB NF
IEEE Asia-Pacific Microwave Conference 2008
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CMOS Direct Sampling Mixer Using Switched Capacitor Filter Technique for Software-Defined Radio
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC) 2008
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Si CMOSプロセスによる右手・左手系伝送線路
電子情報通信学会 総合大会 2007
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90nm CMOSテクノロジーを利用した2.7mW/10GbpsオンチップLVDS型伝送線路配線
2007
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Design of High-Density Interconnects for High-Speed Transmission
The 57th Electronic Components and Technology Conference (ECTC) 2007
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電圧制御発振器の低位相雑音化に関する検討
電子情報通信学会シリコンアナログRF研究会 2007
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Adaptable wire-length distribution with tunable occupation probability
International Workshop on System Level Interconnect Prediction (SLIP) 2007
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A MOS transistor-array for accurate measurement of subthreshold leakage variation
International Symposium on Quality Electronic Design (ISQED) 2007
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非対称Txを用いたオンチップ差動伝送線路配線におけるスケーリングの影響の検討
電子情報通信学会 総合大会 2007
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広帯域化回路を用いたCMOS LC型電圧制御発振器の検討
電子情報通信学会 総合大会 2007
-
ダイアゴナル構造を用いた高密度高速プリント基板配線の研究
電子情報通信学会 総合大会 2007
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可変インダクタを用いたマルチバンド低雑音増幅器の検討
電子情報通信学会 総合大会 2007
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性能指数に基づくオンチップ配線技術評価 ― 長距離配線における伝送線路配線の有効性 ―
応用物理学会シリコンテクノロジー分科会 2007
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A Multi-Drop Transmission-Line Interconnect in Si LSI
Asia and South Pacific Design Automation Conference 2007
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2007年欧州マイクロ波会議出席報告
2007
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WLCSP技術を用いた広帯域低雑音増幅器の検討
電子情報通信学会ソサイエティ大会 2007
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WLCSP技術を用いた可変電力増幅器の検討
電子情報通信学会ソサイエティ大会 2007
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マルチバンドRFフロントエンドに向けた低雑音増幅器の研究
STARCシンポジウム 2007
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伝送線路を用いた多対多オンチップ高速配線の実測による評価
電子情報通信学会ソサイエティ大会 2007
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オンチップ伝送線路配線における低電力パルス伝送用駆動回路
電子情報通信学会ソサイエティ大会 2007
-
高イメージ抑圧比・周波数可変域拡張回路を用いたCMOS電圧制御発振器
電子情報通信学会ソサイエティ大会 2007
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WLCSP技術を用いた高FoM 電圧制御発振器の検討
電子情報通信学会ソサイエティ大会 2007
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双方向・多対多伝送可能なオンチップ伝送線路配線の評価
VDECデザイナーフォーラム 2007
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WLCSP技術を利用したオンチップ伝送線路配線の検討
電子情報通信学会ソサイエティ大会 2007
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WLCSP技術を用いた低消費電力オンチップ伝送線路配線の設計
VDECデザイナーフォーラム 2007
-
ダイアゴナル配線を用いたプリント配線板の配線収容性と伝送特性
電子情報通信学会 総合大会 2007
-
A Low-Latency and High-Power-Efficient On-Chip LVDS Transmission Line Interconnect for an RC Interconnect Alternative
IEEE International Interconnect Technology Conference (IITC) 2007
-
サンプリングミキサに向けたCMOSトランスコンダクタンスアンプの解析
電子情報通信学会 シリコンアナログRF研究会 2007
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Switched Capacitor Filter (SCF)技術を用いたサンプリングミキサの検討
電子情報通信学会 シリコンアナログRF研究会 2007
-
A 8-Gbps Low-Latency Multi-Drop On-Chip Transmission Line Interconnect with 1.2-mW Two-Way Transceivers
IEEE Symposium on VLSI Circuits 2007
-
90nm CMOSオンチップLVDS型伝送線路配線に関する検討
電子情報通信学会シリコンアナログRF研究会 2007
-
A 0.49-6.50GHz Wideband LC-VCO with High-IRR in a 180 nm CMOS Technology
International Conference on Solid State Devices and Materials (SSDM) 2007
-
0.4～6GHzマルチスタンダード無線通信回路実現に向けた広帯域電圧制御発振器の研究
STARCシンポジウム 2007
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Modeling of Multi-Port Inductor Considering Mutual Components
2007
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CMOS技術によるリコンフィギュラブルRF回路技術の研究開発動向と課題
電子情報通信学会 ソフトウェア無線研究会 2007
-
広帯域化回路を用いたCMOS広帯域電圧制御発振器の検討
2006
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バッテリーレスin vivo無線通信用センサモジュール回路の検討
電子情報通信学会 ソサエティ大会 2006
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オンチップ差動伝送線路のWD積による損失の評価
電子情報通信学会 ソサエティ大会 2006
-
リコンフィギュアラブルRF技術によるマルチスタンダード無線通信回路の研究
STARCシンポジウム 2006
-
高速信号伝送に向けたCML型オンチップ差動伝送線路配線の検討
電子情報通信学会 ソサエティ大会 2006
-
小面積CMOS RF分布定数ミキサ
電子情報通信学会 ソサエティ大会 2006
-
容量帰還による広帯域低雑音増幅器の検討
電子情報通信学会 ソサエティ大会 2006
-
可変インダクタを用いたチューナブル低雑音増幅器の検討
電子情報通信学会 ソサエティ大会 2006
-
MOSFETのリーク電流ばらつき測定のための回路検討
電子情報通信学会 ソサエティ大会 2006
-
Si CMOSチップにおける右手・左手系伝送線路の検討
電子情報通信学会 ソサエティ大会 2006
-
指向性アンテナを用いたパッケージ内無線通信
電子情報通信学会 ソサエティ大会 2006
-
Equivalent Circuit Model for On-Chip Variable Inductor
International Conference on Solid State Devices and Materials (SSDM) 2006
-
オンチップ伝送線路を用いた高速信号伝送の研究
VDECデザイナーフォーラム 2006
-
伝送線路を用いたオンチップ高速信号伝送回路の研究
電子情報通信学会 ソサエティ大会 2006
-
On-Chip Yagi Antenna for Wireless Signal Transmission in Stacked MCP
International Conference on Solid State Devices and Materials (SSDM) 2006
-
Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2006
-
リコンフィギュラブル技術によるマルチスタンダード無線通信回路の研究
電子情報通信学会 ソフトウェア無線研究会 2006
-
性能指数に基づく配線技術評価 ― 長距離配線における伝送線路配線の有効性 ―
2006年秋季 第67回 応用物理学会学術講演会 2006
-
相互インダクタンスを考慮した可変インダクタの等価回路モデル
電子情報通信学会シリコンアナログRF研究会 2006
-
オンチップRF受動素子のオンウエハ測定技術に関する検討
電子情報通信学会シリコンアナログRF研究会 2006
-
オンチップ差動伝送線路のWD積による損失評価
2006年秋季 第67回 応用物理学会学術講演会 2006
-
On-Chip Differential-Transmission-Line(DTL) Interconnect for 22nm Technology
Advanced Metallization Conference, Asian Session (ADMETA) 2006
-
MOSFETのサブスレッショルド電流ばらつき測定のための回路検討
電子情報通信学会 システムLSIワークショップ 2006
-
リコンフィギュラブルRF回路に向けた0.98-6.6GHz広帯域VCO
電子情報通信学会シリコンアナログRF研究会 2006
-
リコンフィギュラブルRF回路に向けた0.98-6.6GHz広帯域電圧制御発振器
電子情報通信学会 システムLSIワークショップ 2006
-
A Batteryless Wireless Communication Circuit for Measurement of Gastric Acid
Biomedical Circuits and Systems Conference (BioCAS) 2006
-
A DC-7GHz Small-Area Distributed Amplifier Using 5-port Inductors in a 180nm Si CMOS Technology
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2006
-
高速信号伝送用高密度ボード配線の設計方法
マイクロエレクトロニクスシンポジウム (MES2006) 2006
-
非対称Txを用いたオンチップ差動伝送線路配線
電子情報通信学会シリコンアナログRF研究会 2006
-
プリント基板における高速信号伝送用高密度配線構造の検討
電子情報通信学会シリコンアナログRF研究会 2006
-
A 0.98 to 6.6GHz Tunable Wideband VCO in a 180nm CMOS Technology for Reconfigurable Radio Transceiver
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2006
-
A 6.5-mW 5-Gbps On-Chip Differential Transmission Line Interconnect with a Low-Latency Asymmetric Tx in a 180nm CMOS Technology
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2006
-
Transmission Line Interconnect on Si CMOS LSI
8th International Conference on Solid-State and Integrated-Circuit Technology 2006
-
On-Chip Differential-Transmission-Line(DTL) Interconnect for 22nm Technology
Advanced Metallization Conference (AMC) 2006
-
差動伝送線路を用いたオンチップバスの検討
電子情報通信学会 ソサエティ大会 2006
-
性能指数に基づくオンチップ伝送線路配線の有効性評価
電子情報通信学会 ソサイエティ大会 2006
-
製造と設計にかかわるばらつき
SEMICON Japan 2007
-
Dynamic Reconfigurable Si CMOS VCO Using a Transmission-Line Resonator with PMOS-Bias and PMOS-Crosscouple Topology
IEEE Asia-Pacific Microwave Conference (APMC) 2007
-
Modeling of Three-port Si CMOS On-Chip Symmetric Inductor for Various Operation Modes
2007
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Fine and Wide Frequency Tuning Digital Controlled Oscillators Utilizing Capacitance Position Sensitivity in Distributed Resonators
IEEE Asian Solid -State Circuit Conference (A-SSCC 2007) 2007
-
リコンフィギュラブルRF回路技術の研究
第20回 回路とシステム軽井沢ワークショップ 2007
-
High Frequency Characteristics of On-Chip Wirings up to 110 GHz
Advanced Metallization Conference, Asian Session (ADMETA) 2007
-
バイオメディカル用容量/デジタル変換器の研究
電子情報通信学会 シリコンアナログRF研究会 2007
-
A Low-Power Low-Phase-Noise CMOS VCO using RF SiP Technology
Asia-Pacific Microwave Conference (APMC) 2007
-
A 0.026mm2 Capacitance-to-Digital Converter for Biotelemetry Applications Using a Charge Redistribution Technique
IEEE Asian Solid -State Circuit Conference (A-SSCC 2007) 2007
-
電荷再配分技術を用いた生体観測のための低消費電力データ変換器
電子情報通信学会 システムLSIワークショップ 2007
-
A 5.2GHz CMOS Low Noise Amplifier with High-Q Inductors Embedded in Wafer-Level Chip-Scale Package
International Workshop on RF Integration Technology (RFIT) 2007
-
Wafer-level-packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type voltage controlled oscillator
Advanced Metallization Conference (AMC) 2007
-
伝送線路を用いた動的再構成可能Si CMOS VCOの検討
電子情報通信学会 ソサイエティ大会 2007
-
差動型低雑音増幅器における利得インバランス改善の検討
電子情報通信学会 ソサイエティ大会 2007
-
「グローバル配線」オンチップ伝送線路配線技術
2007
-
分周器を含めた電圧制御発振器の最適化の検討
電子情報通信学会 ソサイエティ大会 2007
-
並列型A/Dコンバータにおけるエンコーダの高速化の検討
電子情報通信学会 ソサイエティ大会 2007
-
ウエハ・レベル・パッケージ再配線の高周波特性
電子情報通信学会シリコンアナログRF研究会 2007
-
高調波抑圧機能を持つマルチバンド電力増幅器の研究
電子情報通信学会 ソサイエティ大会 2007
-
Switched Capacitor Filter (SCF) 技術を用いたサンプリングミキサの検討
電子情報通信学会 ソサイエティ大会 2007
-
Si CMOS 90nmプロセスを用いたミリ波帯電圧制御発振器に関する研究
VDECデザイナーフォーラム 2007
-
High Frequency Characteristics of On-Chip Wirings up to 110 GHz
Advanced Metallization Conference (AMC) 2007
-
Si CMOS RF 分布定数型増幅器の消費電力削減手法
電子情報通信学会 総合大会 2006
-
リコンフィギュラブルRF CMOS無線集積回路技術
電子情報通信学会 回路とシステム軽井沢ワークショップ 2006
-
再配線層技術を用いた低雑音電圧制御発振器の検討
電子情報通信学会 総合大会 2006
-
低雑音増幅器における性能補償技術の検討
電子情報通信学会 総合大会 2006
-
A Design Guideline of On-Chip Differential Transmission Line Structure for High-Frequency Signal Transmission
IEEE Workshop on Signal Propagation on Interconnects (SPI) 2006
-
Si CMOS RF 分布定数型増幅器の設計と評価
電子情報通信学会シリコンアナログRF研究会 2006
-
A 6.5-mW 5-Gbps On-Chip Differential Transmission Line Interconnect with a Low-Latency Asymmetric Tx in a 180nm CMOS Technology
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2006
-
An Left Handed Material on Si CMOS Chip with Wafer Level Package Process
IEEE Asia-Pacific Microwave Conference (APMC) 2006
-
オンチップ可変インダクタの等価回路モデル
電子情報通信学会 総合大会 2006
-
Yield Estimation Tool Considering Via Failures
IEEE Design Automation and Test in Europe (DATE)University Booth 2006
-
ワンチップ無線通信回路に向けたWL-CSP方向性結合器の検討
電子情報通信学会 総合大会 2006
-
A DC-7GHz Small-Area Distributed Amplifier Using 5-port Inductors in a 180nm Si CMOS Technology
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2006
-
A 0.98 to 6.6GHz Tunable Wideband VCO in a 180nm CMOS Technology for Reconfigurable Radio Transceiver
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2006
-
A Batteryless Wireless Communication Circuit for Measurement of Gastric Acid
Biomedical Circuits and Systems Conference (BioCAS) 2006
-
On-Chip Differential-Transmission-Line(DTL) Interconnect for 22nm Technology
Advanced Metallization Conference, Asian Session (ADMETA) 2006
-
Equivalent Circuit Model for On-Chip Variable Inductor
International Conference on Solid State Devices and Materials (SSDM) 2006
-
A Design Guideline of On-Chip Differential Transmission Line Structure for High-Frequency Signal Transmission
IEEE Workshop on Signal Propagation on Interconnects (SPI) 2006
-
Yield Estimation Tool Considering Via Failures
IEEE Design Automation and Test in Europe (DATE)University Booth 2006
-
Transmission Line Interconnect on Si CMOS LSI
8th International Conference on Solid-State and Integrated-Circuit Technology 2006
-
On-Chip Differential-Transmission-Line(DTL) Interconnect for 22nm Technology
Advanced Metallization Conference (AMC) 2006
-
On-Chip Yagi Antenna for Wireless Signal Transmission in Stacked MCP
International Conference on Solid State Devices and Materials (SSDM) 2006
-
Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2006
-
RF CMOS Circuits with Wafer-Level Packaging Inductors
International Wafer-Level Packaging Conference 2008
-
60GHz注入同期型周波数4逓倍器
電子情報通信学会 ソサイエティ大会 2009
-
低電源電圧動作のADCのためのボディバイアス解析
電子情報通信学会 ソサイエティ大会 2009
-
Reconfigurable RF CMOS Circuit Design for Cognitive Radios
International SoC Design Conference (ISOCC) 2009
-
0.5V駆動LSI の実現に向けたLC型発振器によるクロック発生の検討
電子情報通信学会 ソサイエティ大会 2009
-
Class-C VCOを用いたクロック発生器の位相雑音特性の解析
電子情報通信学会 ソサイエティ大会 2009
-
A 9.3MHz to 5.7 GHz Tunable LC-based VCO Using a Divide-by-N Injection-Locked Frequency Divider
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2009
-
A 0.9-3.0 GHz Fully Integrated Tunable CMOS Power Amplifier for Multi-Band Transmitters
Cross-strait Elite University IC Design Workshop 2009
-
A 9.3MHz to 5.7 GHz Tunable LC-based VCO Using a Divide-by-N Injection-Locked Frequency Divider
Cross-strait Elite University IC Design Workshop 2009
-
WLP技術を用いた低位相雑音なCMOS電圧制御発振器
電子情報通信学会 総合大会 2008
-
Design space exploration of low-phase-noise LC-VCO using multiple-divide technique
IEEE International Symposium on Circuits and Systems 2008
-
低消費電力オンチップパルス伝送線路配線
電子情報通信学会 総合大会 2008
-
MS/RFデバイス技術と受動素子技術"
2008
-
多分周による電圧制御発振器の低位相雑音化の検討
電子情報通信学会 総合大会 2008
-
低消費電力オンチップパルス伝送線路配線
電子情報通信学会シリコンアナログRF研究会 2008
-
高Q値ＷＬＰインダクタおよびその5.8GHz帯LC型電圧制御発振器への応用
応用物理学会シリコンテクノロジー分科会 2008
-
容量感度スケーリングを利用した微調整可能デジタル制御発信器
電子情報通信学会 総合大会 2008
-
WLP技術を用いた低雑音増幅器の検討
電子情報通信学会 総合大会 2008
-
広帯域受信機における高調波および相互変調歪の検討
電子情報通信学会 総合大会 2008
-
ミリ波用低雑音増幅器の寄生相互インダクタンスの影響の検討
電子情報通信学会 総合大会 2008
-
多分周を考慮した電圧制御発振器の低位相雑音化の検討
電子情報通信学会 シリコンアナログRF研究会 2008
-
寄生成分を考慮したミリ波電力増幅器の段間マッチングの検討
電子情報通信学会 シリコンアナログRF研究会 2008
-
A Multi-Drop Transmission-Line Interconnect in Si LSI
Asia and South Pacific Design Automation Conference 2007
-
Adaptable wire-length distribution with tunable occupation probability
International Workshop on System Level Interconnect Prediction (SLIP) 2007
-
A Wideband CMOS LC-VCO Using Variable Inductor
Asia and South Pacific Design Automation Conference 2007
-
Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation
Asia and South Pacific Design Automation Conference 2007
-
A MOS transistor-array for accurate measurement of subthreshold leakage variation
International Symposium on Quality Electronic Design (ISQED) 2007
-
A Low-Power Differential Transmission Line Interconnect using Wafer Level Package Technology
IEEE Workshop on Signal Propagation on Interconnects (SPI) 2008
-
CMOS Device Modeling for Millimeter-Wave Power Amplifiers
IEEE International Workshop on RF Integration Technology (RFIT) 2009
-
60GHz Injection Locked Frequency Quadrupler with Quadrature Outputs in 65nm CMOS Process
2009
-
A 0.9-3.0 GHz Fully Integrated Tunable CMOS Power Amplifier for Multi-Band Transmitters
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2009
-
ダミーフィルを考慮した60GHz CMOS増幅器設計
電子情報通信学会シリコンアナログRF研究会 2009
-
LVDS-type On-Chip Transmision Line Interconnect with Passive Equalizers in 90 nm CMOS Process
IEEE/ACM Asia and South Pacific Design Automation Conference (Design Contest) 2008
-
Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors
IEEE/ACM Asia and South Pacific Design Automation Conference (Design Contest) 2008
-
A Multi-Line De-Embedding Technique for Mm-wave CMOS Circuits
IEEE Asia-Pacific Microwave Conference (APMC) 2009
-
Multifunctional Frequency Converter MMIC for 38GHz Band 600Mbps Multi-level QAM Wireless System
IEEE International Workshop on RF Integration Technology (RFIT) 2009
-
CMOS Direct Sampling Mixer Using Switched Capacitor Filter Technique for Software-Defined Radio
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC) 2008
-
Design space exploration of low-phase-noise LC-VCO using multiple-divide technique
IEEE International Symposium on Circuits and Systems 2008
-
ミリ波帯CMOS回路設計のためのマルチラインディエンベディング手法の検討
電子情報通信学会 ソサイエティ大会 2009
-
リング発振器用低雑音電流源の検討
電子情報通信学会 ソサイエティ大会 2009
-
A 8-Gbps Low-Latency Multi-Drop On-Chip Transmission Line Interconnect with 1.2-mW Two-Way Transceivers
IEEE Symposium on VLSI Circuits 2007
-
Modeling of Multi-Port Inductor Considering Mutual Components
2007
-
非対称性を考慮したオンチップ差動インダクタの解析
電子情報通信学会シリコンアナログRF研究会 2008
-
多段ノイズマッチングを考慮した60GHz CMOS LNA
シリコンアナログRF研究会 2008
-
A 2-GHz-band CMOS Low Noise Amplifier with High-Q Inductors Embedded in Wafer-Level Package
International Conference on Solid State Devices and Materials (SSDM) 2008
-
日本発のミリ波実用化に向けて
電子情報通信学会 ソサイエティ大会 2008
-
A Low-Power Low-Phase-Noise CMOS VCO using RF SiP Technology
Asia-Pacific Microwave Conference (APMC) 2007
-
A 5.2GHz CMOS Low Noise Amplifier with High-Q Inductors Embedded in Wafer-Level Chip-Scale Package
International Workshop on RF Integration Technology (RFIT) 2007
-
A 0.026mm2 Capacitance-to-Digital Converter for Biotelemetry Applications Using a Charge Redistribution Technique
IEEE Asian Solid -State Circuit Conference (A-SSCC 2007) 2007
-
A Wideband CMOS LC-VCO Using Variable Inductor
Asia and South Pacific Design Automation Conference 2007
-
Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation
Asia and South Pacific Design Automation Conference 2007
-
Dynamic Reconfigurable Si CMOS VCO Using a Transmission-Line Resonator with PMOS-Bias and PMOS-Crosscouple Topology
IEEE Asia-Pacific Microwave Conference (APMC) 2007
-
Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors
2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF) 2007
-
Modeling of Three-port Si CMOS On-Chip Symmetric Inductor for Various Operation Modes
2007
-
Fine and Wide Frequency Tuning Digital Controlled Oscillators Utilizing Capacitance Position Sensitivity in Distributed Resonators
IEEE Asian Solid -State Circuit Conference (A-SSCC 2007) 2007
-
Wafer-level-packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type voltage controlled oscillator
Advanced Metallization Conference (AMC) 2007
-
High Frequency Characteristics of On-Chip Wirings up to 110 GHz
Advanced Metallization Conference, Asian Session (ADMETA) 2007
-
Design of High-Density Interconnects for High-Speed Transmission
The 57th Electronic Components and Technology Conference (ECTC) 2007
-
A Low-Latency and High-Power-Efficient On-Chip LVDS Transmission Line Interconnect for an RC Interconnect Alternative
IEEE International Interconnect Technology Conference (IITC) 2007
-
A 0.49-6.50GHz Wideband LC-VCO with High-IRR in a 180 nm CMOS Technology
International Conference on Solid State Devices and Materials (SSDM) 2007
-
High Frequency Characteristics of On-Chip Wirings up to 110 GHz
Advanced Metallization Conference (AMC) 2007
-
A Low-Power Differential Transmission Line Interconnect using Wafer Level Package Technology
IEEE Workshop on Signal Propagation on Interconnects (SPI) 2008
-
Statistical Modeling of Gate-delay Variation with Consideration of Intra-gate Variability
2003
-
Preliminary Measurements for in-vivo Wireless Communication Chip
2003
-
Small Area Inductor for Silicon CMOS Chip
2004
-
Optimization Methodology of Global Interconnect Structure
2004
-
On-Chip Transmission Line for Long Global Interconnects
2004
-
High Density Bus Line Structure With Pseudo Differential Transmission Line in Si ULSI
2004
-
Statistical Gate-delay Modeling with Intra-gate Variability
2003
-
A Statistical Gate Delay Model for Intra-chip and Inter-chip Variabilities
2003
-
Design Optimization Methodology of Spiral Inductors on Silicon
2003
-
Differential Transmission Line Interconnect for High Speed and Low Power Global Wiring
2004
-
High Speed and Low Power On-Chip Micro Network Circuit with Differential Transmission Line
2004
-
Wide-Range RF Variable Inductor on Si CMOS Chip with MEMS Actuator
2004
-
省面積Siオンチップスネーク型インダクタ
2004
-
Si CMOS チップにおけるEMI 低減のための縒り合わせ差動伝送線路構造
2004
-
オンチップ可変インダクタを用いた広帯域マッチングネットワーク
2004
-
オンチップマイクロネットワーク通信の実現に向けた高速信号伝送線路配線駆動回路の設計
2004
-
Wire Length Distribution of SoC considering Macro Block Shapes
2004
-
Dynamic Reconfigurable RF Circuit Design
2004
-
Si ULSI内における擬差動伝送線路構造の検討
2004
-
Pseudo Differential Transmission Line Structure on Si ULSI
2004
-
サプライリプル低減による高効率を実現するD級アンプの研究
田中 遥斗, Yuncheng Zhang, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
フェーズドアレイによる平面アンテナを用いた月地球間大容量無線通信の研究
絹川 竜史, 國弘 和明, 酒井 啓之, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
A K/Ka-Band Satellite Terminal Beamforming Front-End-Module Utilizing Dual-Band Self-Diplexing Antennas
Jill Mayeda, Dongwon You, Xi Fu, Xiaolin Wang, Hans Heridian, 井出 倫滉, Takashi Tomura, Hero Sakai, Kazuaki Kunihiro, Kenichi Okada, Atsushi Shirane
電子情報通信学会 集積回路研究会 2024.12
-
配置効率を考慮した配線長分布
2003
-
スケーラブルな電力合成器を用いた長距離無線電力伝送システムの研究
菊地 真之, 井出 倫滉, 湯浅 景斗, 加藤 星凪, 岡田 健一, 白根 篤史
電子情報通信学会 集積回路研究会 2024.12
-
差動伝送線路を用いた Si ULSI内の広帯域バス構造
2003
-
An LEO-Satellite-Mounted Ka-Band Dual Circularly Polarized CMOS Transmitter with Adaptive Scan Impedance Tuner and Active XPD Calibration Technique
Xiaolin Wang, Dongwon You, Yun Wang, Xi Fu, Hans Herdian, Ashbir Fadila, Hojun Lee, 井出 倫滉, Sena Kato, Zheng Li, Jian Pang, 白根 篤史, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
Si ULSI内の差動伝送線路の設計及び評価
2003
-
6G端末に向けた高密度D-bandフェーズドアレイ無線機
山崎 雄大, Sunghwan Park, 内野 攻哉, Chenxin Liu, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
差動伝送線路を用いた Si ULSI内の広帯域バス構造
2003
-
周波数変調連続波用低ジッターPLLに関する研究
Zezheng Liu, Yuncheng Zhang, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
第6世代移動通信システムに向けた高精度D-Band移相器
内野 攻哉, 山崎雄大, Sunghwan Park, Chenxin Liu, 田 安宜, Abanob Shehata, 酒井 啓之, 國弘 和明, 白根篤史, 岡田健一
電子情報通信学会 集積回路研究会 2024.12
-
長距離伝送に向けた低損失差動出力バトラーマトリクスによる無線給電型中継機
湯浅 景斗, 加藤 星凪, 井出 倫滉, 戸村 崇, 岡田 健一, 白根 篤史
電子情報通信学会 集積回路研究会 2024.12
-
in vivo ワイヤレス通信チップ用アンテナに関する研究 －電磁波の人体透過特性－
2003
-
宇宙用折りたたみ構造フェーズドアレイKa帯無線機CMOSビームフォーミングICのトータルドーズ耐性
成清 泰斗, Dongwon You, 岡田 健一, 白根 篤史
電子情報通信学会 集積回路研究会 2024.12
-
D-bandにおけるスケーラブルなフェーズドアレイアンテナの実現に向けたRFICの構想
小島 拓己, 内野 攻哉, 山崎 雄大, 國弘 和明, 酒井 啓之, 白根 篤史, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
公共サービスとしてのネットニュース配送網の設計と運用
2003
-
Statistical Gate-delay Modeling with Intra-gate Variability
2003
-
6Gに向けたDバンドCMOS高速無線通信機
Chenxin Liu, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
Statistical Modeling of Gate-delay Variation with Consideration of Intra-gate Variability
2003
-
ゲート内ばらつきを考慮した遅延ばらつきのモデル化手法
2003
-
Design Optimization Methodology of Spiral Inductors on Silicon
2003
-
A Statistical Gate-Delay Model Considering Intra-Gate Variability
2003
-
Design Optimization Methodology for On-Chip Spiral Inductors in S-parameter Domain
2003
-
mmWave/THz Design: A New Paradigm or a Repeat of History with Faster Transistors? Invited
Kenichi Okada
IEEE Custom Integrated Circuits Conference 2025.4
-
Low Crosstalk Differential Transmission Line Interconnect on Si ULSI
2003
-
Low Crosstalk Bus Line Configuration Using Differential Transmission Line Interconnect on Si ULSI
2003
-
mmW and Sub-THz CMOS Front-End Design for 6G Invited International conference
Kenichi Okada
Hong Kong University of Science and Technology 2025.1
-
A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond
Minzhe Tang, Yi Zhang, Jian Pang, Zheng Li, Dongfan Xu, Dingxing Xu, Yuncheng Zhang, 國弘 和明, 酒井 啓之, 白根 篤史, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
チップ内での変動を考慮した製造ばらつきのモデル化
2003
-
Future of Analog Design: Still Magical or Mostly Digital? Invited International conference
Kenichi Okada
IEEE International Solid-State Circuits Conference 2025.2
-
A Statistical Gate Delay Model for Intra-chip and Inter-chip Variabilities
2003
-
50GHz Stack PCB based Horn Antenna Design
田 安宜, Chenxin Liu, 國弘 和明, 酒井 啓之, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
A Time-Mode-Doherty Digital Quadrature Power Amplifier Based on 2-bit DSM and Transformer Combined FIR Filter
Duo Li, Yuncheng Zhang, 岡田 健一
電子情報通信学会 集積回路研究会 2024.12
-
集積化無線送受信機におけるPA-LNA間アイソレーションの評価
電子情報通信学会 総合大会 2009
-
容量感度スケーリングを用いたミリ波注入同期型発振器
電子情報通信学会 総合大会 2009
-
SiCMOSを用いた60GHz帯無線通信回路の検討
電子情報通信学会 LSIとシステムのワークショップ 2009
-
並列型ADC用の参照電圧回路のRC遅延に関する検討
電子情報通信学会 総合大会 2009
-
Passive Device Characterization for 60-GHz CMOS Power Amplifiers
IEEE Global Symposium on Millimeter Waves 2009
-
Si CMOSを用いた60GHz帯無線通信回路の検討
電子情報通信学会 LSIとシステムのワークショップ 2009
-
ミリ波帯CMOS回路測定のためのディエンベディング方法の検討
電子情報通信学会 総合大会 2009
-
WCDMA受信機における段間ノッチフィルタの低雑音化に関する検討
電子情報通信学会 総合大会 2009
-
A Design Optimization of Low-Phase-Noise LC-VCO Using Multiple-Divide Technique
Workshop on Synthesis And System Integration of Mixed Information technologies 2009
-
Multifunctional Frequency Converter MMIC for 38GHz Band 600Mbps Multi-level QAM Wireless System
IEEE International Workshop on RF Integration Technology (RFIT) 2009
-
A 60GHz CMOS VCO Using a Reduced Resonator Loading Architecture
IEEE International Solid-State Circuits Conference (ISSCC) 2009
-
A 9.3MHz to 5.7 GHz Tunable LC-based VCO Using a Divide-by-N Injection-Locked Frequency Divider
Cross-strait Elite University IC Design Workshop 2009
-
A 9.3MHz to 5.7 GHz Tunable LC-based VCO Using a Divide-by-N Injection-Locked Frequency Divider
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2009
-
A 0.9-3.0 GHz Fully Integrated Tunable CMOS Power Amplifier for Multi-Band Transmitters
Cross-strait Elite University IC Design Workshop 2009
-
60GHz Injection Locked Frequency Quadrupler with Quadrature Outputs in 65nm CMOS Process
2009
-
A Multi-Line De-Embedding Technique for Mm-wave CMOS Circuits
IEEE Asia-Pacific Microwave Conference (APMC) 2009
-
A 0.9-3.0 GHz Fully Integrated Tunable CMOS Power Amplifier for Multi-Band Transmitters
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2009
-
CMOS Device Modeling for Millimeter-Wave Power Amplifiers
IEEE International Workshop on RF Integration Technology (RFIT) 2009
-
A Comparison between Varactor-DAC and Capacitor-Bank DCOs
2009
-
Reconfigurable RF CMOS Circuit Design for Cognitive Radios
International SoC Design Conference (ISOCC) 2009
-
A 0.114-mW Dual-Conduction Class-C CMOS VCO with 0.2-V Power Supply
IEEE Symposium on VLSI Circuits 2009
-
Design Optimization of Voltage Controlled Oscillators in Consideration of Parasitic Capacitance
IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) 2009
-
トランジスタの寄生容量を考慮した電圧制御発振器の最適設計手法の検討
電子情報通信学会 ソサイエティ大会 2009
-
A 0.114-mW Dual-Conduction Class-C CMOS VCO with 0.2-V Power Supply
IEEE Symposium on VLSI Circuits 2009
-
0.2V Dual-Conduction Class-C 電圧制御発振器
STARCシンポジウム 2009
-
CMOSプロセスによる60GHz帯無線送信回路の開発
STARCシンポジウム 2009
-
0.2V電源で動作可能な0.114mWデュアルコンダクションClass-C VCO
電子情報通信学会シリコンアナログRF研究会 2009
-
Design Optimization of Voltage Controlled Oscillators in Consideration of Parasitic Capacitance
IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) 2009
-
WCDMA無線受信機におけるノッチフィルタの歪み特性解析
電子情報通信学会 ソサイエティ大会 2009
-
バラクタとDAC を用いたデジタル制御発振器の検討
電子情報通信学会 ソサイエティ大会 2009
-
集積化されたPA-LNA間のカップリング経路の実測評価
電子情報通信学会 ソサイエティ大会 2009
-
CMOSプロセスによる60GHz帯無線送信回路の開発
電子情報通信学会 ソサイエティ大会 2009
-
Low-Impedance and High-Q Transmission Line for mmw VCO
IEEE Workshop on Signal Propagation on Interconnects (SPI) 2009
-
多段ノイズマッチングを考慮した低雑音60GHz CMOS LNA
電子情報通信学会 集積回路研究会 2009
-
CMOS 回路の比精度ばらつきにおける大域ばらつきのモデル化
1998
-
微細化プロセスによるばらつきを考慮した統計的解析設計環境の開発
1998
-
レイアウトを考慮した CMOS 回路の比精度解析
1998
-
レイアウトを考慮した CMOS 回路の比精度解析
電子情報通信学会ソサイエティ大会 1997
-
MOS 集積回路の統計的モデル化手法
電子情報通信学会 システムLSI琵琶湖ワークショップ 1997
-
Low Crosstalk Differential Transmission Line Interconnect on Si ULSI
2003
-
Low Crosstalk Bus Line Configuration Using Differential Transmission Line Interconnect on Si ULSI
2003
-
Variable RF Inductor on Si CMOS Chip
2003
-
Low Crosstalk Differential Transmission Line Interconnect on Si ULSI
2003
-
動的再構成可能なアナログＲＦ回路設計技術
2003
-
動的再構成によるLC-VCOの広帯域化
2003
-
A Statistical Gate-Delay Model Considering Intra-Gate Variability
2003
-
Design Optimization Methodology for On-Chip Spiral Inductors in S-parameter Domain
2003
-
可変インダクタを用いた動的再構成RF回路設計技術
2003
-
ゲート遅延におけるチップ内ばらつきを考慮した統計遅延解析手法
2002
-
可変インダクタを用いた広帯域LC型電圧制御発振器
2003
-
差動伝送線路を用いたSi ULSI内の低クロストークバスライン
2003
-
Si ULSIにおける差動伝送線路駆動回路の設計
2003
-
ネットリストからの配線長分布導出
2003
-
可変インダクタを用いた広帯域電圧制御発振器
2003
-
MEMS技術を用いたRF可変インダクタ
2003
-
電磁界解析を用いたボード内部受動素子の特性評価
2003
-
Preliminary Measurements for in-vivo Wireless Communication Chip
2003
-
in vivoワイヤレス通信チップ用アンテナに関する研究－電磁波の人体透過特性－
2003
-
配置効率を考慮した配線長分布予測
2003
-
トランジスタ製造ばらつきにおけるチップ内特性変動を考慮した統計遅延解析手法
2001
-
A Method for Linking Process-level Variability to System Performances
2000
-
CMOS 回路の統計解析における大域ばらつきのモデル化
2000
-
Statistical Modeling of Device Characteristics with Systematic Fluctuation
2000
-
Statistical Modeling of Device Characteristics with Systematic Fluctuation
2000
-
A Method for Linking Process-level Variability to System Performances
2000
-
CMOS 回路の統計解析における大域ばらつきのモデル化
1999
-
Micro-Loading 効果を考慮した CMOS 回路の比精度解析
電子情報通信学会 総合大会 1998
-
中間モデルを用いた MOSFET モデルに依存しない比精度パラメータ抽出手法
1999
-
システム特性の階層的統計的設計手法
1999
-
チップ内ばらつきを考慮したゲート遅延の統計モデル作成手法
2002
-
FLIM/SEMI における電子メールセキュリティ
2002
-
CMOS論理ゲートにおける統計的遅延モデル化手法
2002
-
トランジスタ特性のチップ内ばらつきを考慮した統計遅延解析手法
2002
-
スパイラルインダクタの最適設計手法
2002
-
LSI設計における製造ばらつきの考慮
2001
-
トランジスタ特性におけるチップ内ばらつきのモデル化手法
2001
-
CMOS論理ゲートにおけるセル内特性ばらつきを考慮した統計的遅延モデル化手法
2002
-
チップ内でのばらつきを考慮したトランジスタ特性ばらつきモデル化手法
2001
-
スパイラルインダクタのモデル化と最適化
2001
-
Numerical Analysis of Asymmetric Differential Inductors
IEEE Asia-Pacific Microwave Conference 2008
-
A Three-Stage 60GHz CMOS LNA Using Dual Noise-Matching Technique for 5dB NF
IEEE Asia-Pacific Microwave Conference 2008
-
Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors
2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF) 2007
-
ミリ波CMOS PAのモデリングおよび設計手法
電子情報通信学会シリコンアナログRF研究会 2008
-
ミリ波CMOS回路設計のための測定評価技術
電子情報通信学会シリコンアナログRF研究会 2008
-
インダクタの自己共振補正を考慮したLC-VCOの最適化
電子情報通信学会 ソサイエティ大会 2008
-
ミリ波帯電力増幅器の出力整合回路における配線構造最適化の検討
電子情報通信学会 ソサイエティ大会 2008
-
アクティブフィルタによるW-CDMA受信機の歪抑制に関する検討
電子情報通信学会 ソサイエティ大会 2008
-
低インピーダンス伝送線路を用いたミリ波帯VCOの低雑音化の検討
電子情報通信学会 ソサイエティ大会, 2008
-
RF CMOS Circuits with Wafer-Level Packaging Inductors
International Wafer-Level Packaging Conference 2008
-
A 80GHz Voltage Controlled Oscillator With a Negative Varactor in 90nm CMOS Technology
IEEE Asian Solid-State Circuits Conference 2008
-
ダブルテールラッチ型コンパレータとプリアンプを用いたコンパレータの性能比較
電子情報通信学会 ソサイエティ大会 2008
-
オンチップ差動インダクタの構造による非対称性の解析
電子情報通信学会 ソサイエティ大会 2008
-
コンパレータノイズがA/Dコンバータの性能に与える影響に関する研究
電子情報通信学会 ソサイエティ大会 2008
-
容量DACの寄生容量がSAR ADCの精度に与える影響の検討
電子情報通信学会 ソサイエティ大会 2008
-
A Low Phase Noise LC-VCO with a High-Q Inductor Fabricated by Wafer Level Package Technology
Radio Frequency Integrated Circuits Symposium 2008 (RFIC 2008) 2008
-
アナログデジタル混載LSIの動向と実装の課題
エレクトロニクス実装学会 平成20年度第1回システム実装CAE研究会 2008
-
Low Crosstalk Differential Transmission Line Interconnect on Si ULSI
2003
-
TL(Thru-Line)校正によるパッド部のディエンベディング手法
電磁界理論研究会 2010
-
60GHz 帯CMOS無線送受信回路の研究
電子情報通信学会 LSIとシステムのワークショップ 2010
-
60GHz ダイレクトコンバージョントランシーバ用20GHz PLL
電子情報通信学会 LSIとシステムのワークショップ 2010
-
集積化されたPA-LNA間のisolation実測評価
電子情報通信学会シリコンアナログRF研究会 2010
-
ミリ波帯電力増幅器における発振の検証
電子情報通信学会シリコンアナログRF研究会 2010
-
ミリ波帯CMOS回路設計技術
応用物理学会シリコンテクノロジー分科会 2010
-
インダクタ構造の変化によるCMOS RF回路小型化に関する研究
電子情報通信学会 LSIとシステムのワークショップ 2010
-
60GHz帯CMOS差動増幅回路の高CMRR化に関する検討
電子情報通信学会 総合大会 2010
-
2-6GHz広帯域チューナブルCMOS電力増幅器
電子情報通信学会 総合大会 2010
-
Reconfigurable RF CMOS Circuits for Cognitive Radios
IEEE International Solid-State Circuits Conference (ISSCC) 2010
-
A 10MHz to 7GHz Quadrature Signal Generation Using a Divide-by-4/3, -3/2, -5/3, -2, -5/2, -3, -4, and -5 Injection-Locked Frequency Divider
IEEE International Solid-State Circuits Conference (ISSCC) 2010
-
A 2-6 GHz Fully Integrated Tunable CMOS Power Amplifier for Multi-Standard Transmitters
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC) 2010
-
A 60GHz Direct-Conversion Transmitter in 65nm CMOS Technology
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC) 2010
-
ダミーメタル入り伝送線路の伝搬定数の固有値解析
電子情報通信学会総合大会 2010
-
クロスカップルキャパシタを用いた60GHz CMOS差動電力増幅回路
電子情報通信学会シリコンアナログRF研究会 2010
-
Variable RF Inductor on Si CMOS Chip
2003
-
A 300GHz-Band 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOS
Chun Wang, Hans Herdian, Chenxin Liu, Jill Mayeda, Yuxuan Liu, Olivia Angel Yong, Wenqian Wang, Yuncheng Zhang, Carrel da Gomez, Abanob Shehata 加藤, 星凪, 酒井 啓之, 白根 篤史, 岡田 健一
電子情報通信学会 LSIとシステムのワークショップ 2024.5
-
A 24-71-GHz Dual-Mode Mixer with Harmonic-Selection Technique for Multi-Band 5G NR
Dongfan Xu, Minzhe Tang, Yi Zhang, Zheng Li, 白根 篤史, 岡田 健一
電子情報通信学会 LSIとシステムのワークショップ 2024.5
-
A 2-6 GHz Fully Integrated Tunable CMOS Power Amplifier for Multi-Standard Transmitters
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC) 2010
-
A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter
Yuang Xiong, Dingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, 白根 篤史, 岡田 健一
電子情報通信学会 LSIとシステムのワークショップ 2024.5
-
A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference Cancellation and LO Feedthrough Suppression
Abanob Shehata, Chun Wang, Ibrahim Abdo, Chenxin Liu, Carrel da Gomez, Jill Mayeda, Hans Herdian, Wenqian Wang, Xi Fu, Dongwon You, Sunghwan Park, Yun Wang, Jian Pang, 酒井 啓之, 白根 篤史, 岡田 健一
電子情報通信学会 LSIとシステムのワークショップ 2024.5
-
Sub-THz CMOS Phased-Array Transceiver Design for 6G Invited International conference
Kenichi Okada
IEEE International Symposium on Circuits and Systems 2024.5
-
6Gに向けたミリ波帯・テラヘルツ帯フェーズドアレイ無線技術 Invited
岡田健一
ローデ・シュワルツ Technology Symposium 2024 2024.5
-
Large-Aperture Flexible Phased Array with CMOS Beamformer for Small Satellites Invited International conference
Kenichi Okada
IEEE MTT-S International Microwave Symposium 2024.6
-
Total Ionizing Does Effect of Ka-band CMOS Beam Forming IC for Spaceborne Phased-Array Transceiver on Deployable Membrane Structures International conference
Yasuto Narukiyo, You Dongwon, Kenichi Okada, Atsushi Shirane
IEEE RADECS 2024.9
-
Sub-THz CMOS Transceiver Design for 6G Invited
Kenichi Okada
IEEE European Solid-State Electronics Research Conference 2024.9
-
A 28GHz 5G NR Wirelessly Powered Relay Transceiver Using Rectifier-Type 4th-OrderSub-Harmonic Mixer
Sena Kato, Shu Date, Tao Ruoxin, Yasuto Narukiyo, Hiroki Hayashi, Keito Yuasa, Michihiro Ide, Takashi Tomura, Kenichi Okada, Atsushi Shirane
電子情報通信学会 集積回路研究会 2024.12
-
Sub-THz Transceiver Design in CMOS Invited International conference
Kenichi Okada
IEEE MTT-S European Microwave Conference 2024.9
-
A 640-Gb/s 4x4-MIMO D-Band CMOS Transceiver Chipset Invited
Kenichi Okada
IEEE SSCS Japan Chapter VLSI Circuits報告会 2024.7
-
6Gに向けたミリ波帯・テラヘルツ帯フェーズドアレイ無線技術 Invited
岡田健一
電気学会 電子デバイス研究会 2024.7
-
A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond Invited
Yi Zhang, Minzhe Tang, Jian Pang, Zheng Li, Dongfan Xu, Dingxin Xu, Yuncheng Zhang, 國弘 和明, 酒井 啓之, 白根 篤史, 岡田 健一
IEEE SSCS Japan Chapter VLSI Circuits報告会 2024.7
-
A 28GHz 5G NR Wirelessly Powered Relay Transceiver Using Rectifier-Type 4th-Order Sub-Harmonic Mixer Invited
加藤 星凪, 伊達 脩, Tao Ruoxin, 成清 泰斗, 林 拓希, 湯浅 景斗, 井出 倫滉, 戸村 祟, 岡田 健一, 白根 篤史
IEEE SSCS Japan Chapter VLSI Circuits報告会 2024.7
-
キャパシタクロスカップルを用いた2.4GHz CMOS PA
電子情報通信学会シリコンアナログRF研究会 2010
-
10MHz to 7GHz Quadrature Signal Generation Using a Divide-by-4/3, -3/2, -5/3, -2, -5/2, -3, -4, and -5 Injection-Locked Frequency Divider
電子情報通信学会シリコンアナログRF研究会 2010
-
Passive Device Characterization for 60-GHz CMOS Power Amplifiers
IEEE Global Symposium on Millimeter Waves 2009
-
Low-Impedance and High-Q Transmission Line for mmw VCO
IEEE Workshop on Signal Propagation on Interconnects (SPI) 2009
-
A 60GHz CMOS VCO Using a Reduced Resonator Loading Architecture
IEEE International Solid-State Circuits Conference (ISSCC) 2009
-
A Design Optimization of Low-Phase-Noise LC-VCO Using Multiple-Divide Technique
Workshop on Synthesis And System Integration of Mixed Information technologies 2009
-
10MHz to 7GHz Quadrature Signal Generation Using a Divide-by-4/3, -3/2, -5/3, -2, -5/2, -3, -4, and -5 Injection-Locked Frequency Divider
IEEE Symposium on VLSI Circuits 2010
-
65nm CMOSにおける低損失220GHz-325GHzマーチャントバラン
田 安宜, Chenxin Liu, 酒井 啓之, 國弘 和明, 白根 篤史, 岡田 健一
電子情報通信学会 LSIとシステムのワークショップ 2024.5
-
Reconfigurable CMOS LNA for Software Defined Radio Using Variable Inductor
2005
-
High-Density Differential Transmission Line Bus Structure for 65nm Technology
2005
-
A Large Variable Ratio Inductor with Spider Legs Shield
2005
-
On-Chip Variable Inductor using MOSFET Switches
2005
-
A Reconfigurable RF Circuit Architecture for Dynamic Power Reduction
2005
-
Fabrication of high-performance on-die passives based on multi-Cu-layer WLP processes
2005
-
A 1.3-2.8 GHz Wide Range CMOS LC-VCO Using Variable Inductor
2005
-
4 Gbps On-Chip Interconnection using Differential Transmission Line
2005
-
Si CMOSにおけるオンチップ伝送線路配線技術
電気・電子機器のEMCワークショップ 2006
-
A Dynamic Reconfigurable RF Circuit Architecture
2005
-
Evaluation of On-Chip Transmission Line Interconnect Using Wire Length Distribution
2005
-
An Left Handed Material on Si CMOS Chip with Wafer Level Package Process
IEEE Asia-Pacific Microwave Conference (APMC) 2006
-
Comparison of compact on-chip inductors embedded in Wafer-level Package
2005 Electronic Components and Technology Conference 2005
-
Integration of the passive element above IC wafers by applying Wafer Level Package technology
2005
-
Integration of the passive element above IC wafers by applying Wafer Level Package technology
3rd International Workshop on High Frequency Micromagnetic Devices and Materials 2005
-
Prediction of Delay Time for Future LSI Using On-Chip Transmission Line Interconnects
2005
-
On-Wafer Measurement of Pseudo Differential Transmission Line for Global Interconnect in Si LSI
2005
-
Wire Length Distribution Model Considering Core Utilization for System on Chip
2005
-
Wire Length Distribution Model Considering Core Utilization for System on Chip
2005
-
リコンフィギャラブルRF回路に向けた広帯域LNA
2005
-
配置効率を考慮したSoCの配線長分布
2005
-
Si ULSI内における擬差動伝送線路の実測による評価
2005
-
ウエハレベルCSP技術を用いた方向性結合器
2005
-
On-Wafer Measurement of Pseudo Differential Transmission Line for Global Interconnect in Si LSI
2005
-
Integration of the passive element above IC wafers by applying Wafer Level Package technology
2005
-
超高速LSI に向けたオンチップ差動伝送線路配線技術
2005
-
Prediction of Delay Time for Future LSI Using On-Chip Transmission Line Interconnects
2005
-
Integration of the passive element above IC wafers by applying Wafer Level Package technology
3rd International Workshop on High Frequency Micromagnetic Devices and Materials 2005
-
Above ICプロセスを用いた高周波回路設計
2005
-
Comparison of Compact On-Chip Inductors Embedded in Wafer-Level Package
The 55th Electronic Components and Technology Conference 2005
-
GHz帯マルチバンド無線回路向けVCO及び分周器についての検討
2005
-
Reconfigurable RF Circuit Design for Multi-Function and Self-Compensation
2005
-
オンチップGHz伝送線路配線
2005
-
再構成可能 RF CMOS 無線集積回路の研究
2005
-
A Dynamic Reconfigurable RF Circuit Architecture
2005
-
Evaluation of On-Chip Transmission Line Interconnect Using Wire Length Distribution
2005
-
オンチップ伝送線路を用いた将来におけるLSIの遅延時間予測手法
2005
-
アナログ・RF用微細デバイス技術
2005
-
配置効率を考慮したSoC のマクロ面積配分手法
2005
-
Battery-less Wireless Communication System through Human Body for in-vivo Healthcare Chip
2004
-
Differential Transmission Line Structure for Over 10 Gbps Signal Transmission at Global Interconnect in Si ULSI
2004
-
High-Q Variable Inductor Using Redistributed Layers for Si RF Circuits
2004
-
A Wide Tuning Range CMOS VCO using Variable Inductor
2004
-
On-chip Spiral Inductors Integrated with Wafer-Level Package
2004
-
Small Area Snake Inductor on Si RF CMOS Chip
2004
-
in-vivo Wireless Communication System for Bio MEMS Sensors
2004
-
Optimization Technique of Number of Interconnect Layers and Circuit Area Based on Wire Length Distribution
2004
-
Twisted Differential Transmission Line Structure for EMI Noise Reduction at Global Interconnect in Si LSI
2004
-
High-Speed Transmission Circuit for Micro-Network on Si ULSI
2004
-
On-chip high-Q spiral Cu inductors embedded in wafer-level chip-scale package for silicon RF application
IEEE MTT-S International Microwave Symposium 2004
-
High Speed and Low Power Global Interconnect IP with Differential Transmission Line and Driver-Receiver Circuits
2004
-
On-chip High-Q Solenoid Inductors Embedded in WL-CSP
2004
-
On-Chip High-Q Cu Inductors Embedded In Wafer-Level Chip-Scale Package for Silicon RF Application
2004
-
Pseudo Differential Transmission Line Structure on Si ULSI
2004
-
擬差動伝送線路を用いたオンチップ高密度伝送線路配線
2005
-
伝送線路を用いたオンチップ高速高密度バス線路の検討
2005
-
Si RF CMOS 分布定数型増幅器の設計
2005
-
MOSFET スイッチを用いたオンチップ可変インダクタ
2005
-
オンチップ伝送線路配線技術
2005
-
オンチップ長距離配線に適用可能なゼロクロストークバスラインの検討
2005
-
側方シールドを用いた高可変率オンチップインダクタ
2005
-
VCOと分周器を用いたGHz帯広帯域発振器の検討
2005
-
可変バイアス回路を用いたリコンフィギュアラブルLNAの検討
2005
-
MEMSを用いたオンチップ可変トランス
2005
-
差動インダクタの信号励起モードの比較検討
2005
-
MEMS可変インダクタを用いたリコンフィギュラブルRF回路技術
2005
-
配線長分布を用いたビア数分布の解析
2005
-
オンチップ伝送線路配線による回路性能向上予測
2005
-
オンチップ伝送線路配線の高密度化に関する研究
2005
-
リコンフィギュアラブルRF CMOS無線集積回路の研究
2005
-
オンチップ伝送線路を用いたマルチドロップバスの検討
2005
-
Development of Differential Transmission Line Interconnect IP for High-Speed Global Interconnect
2005
-
Zero-Crosstalk Bus Line Structure for Global Interconnects in Si ULSI
2005
-
オンチップ伝送線路配線の設計および評価
2005
-
リコンフィギュラブルRF回路設計技術
2005
-
A Large Variable Ratio Inductor with Spider Legs Shield
2005
-
Modeling for Variable RF Inductor on Si CMOS Chip
2004
-
Wide Tunable LC-VCO using Variable Inductor
2004
-
Battery-less Wireless Communication System Using PIM for in-vivo Healthcare Chip
2004
-
ULSI Interconnect Length Distribution Model Considering Core Utilization
2004
-
Modeling and Optimization of On-Chip Spiral Inductors in S-parameter Domain
2004
-
世界最速スーパーコンピュータの実現に向けた配線設計
2005
-
超高速プロセッサが未来を造る
2005
-
Reconfigurable RF Circuit Design for Multi-Function and Self-Compensation
2005
-
究極の無線通信端末を目指したSi ULSIの研究
2005
-
第4世代携帯電話を実現するRF回路設計技術
2005
-
Extraction and Verification Methodology for MOS Transistor Fluctuation with Intra-chip and Inter-chip Variabilities
2004
-
A Reconfigurable RF Circuit Architecture for Dynamic Power Reduction
2005
-
Fabrication of high-performance on-die passives based on multi-Cu-layer WLP processes
2005
-
A 1.3-2.8 GHz Wide Range CMOS LC-VCO Using Variable Inductor
2005
-
4 Gbps On-Chip Interconnection using Differential Transmission Line
2005
-
On-Chip Variable Inductor using MOSFET Switches
2005
-
Reconfigurable CMOS LNA for Software Defined Radio Using Variable Inductor
2005
-
伝送線路を用いたオンチップマルチドロップバスの検討
2005
-
曲げおよびビアを有するオンチップ伝送線路の高周波特性評価
2005
-
Si CMOS オンチップインダクタの構造及び動作モードの比較検討
2005
-
High-Density Differential Transmission Line Bus Structure for 65nm Technology
2005
-
可変インダクタを用いた1.3～2.8GHz CMOS LC-VCOの設計
電子情報通信学会シリコンアナログRF研究会 2005
-
mmW/THz Phased-Array Transciever Design for 6G Era Invited
Kenichi Okada
IEEE European Conference on Networks and Communications 2025.6
-
On-chip High-Q Solenoid Inductors Embedded in WL-CSP
2004
-
On-Chip High-Q Cu Inductors Embedded In Wafer-Level Chip-Scale Package for Silicon RF Application
2004
-
Battery-less Wireless Communication System Using PIM for in-vivo Healthcare Chip
2004
-
リコンフィギュラブルRF回路設計技術
2004
-
広帯域RF回路の設計アプローチ -広帯域マッチングネットワーク-
2004
-
On-chip high-Q spiral Cu inductors embedded in wafer-level chip-scale package for silicon RF application
IEEE MTT-S International Microwave Symposium 2004
-
配線長分布によるセル配置効率の最適化手法
2004
-
Pseudo Differential Transmission Line Structure on Si ULSI
2004
-
High Speed and Low Power Global Interconnect IP with Differential Transmission Line and Driver-Receiver Circuits
2004
-
配線長分布を用いたLSIの配線層数と回路面積の最適化
2004
-
in vivo ワイヤレス通信チップ用送受信回路に関する研究
2004
-
可変インダクタを用いた広帯域CMOS VCOの設計
2004
-
樹脂基板内RFスパイラルインダクタの評価
2004
-
リコンフィギュラブルＲＦ回路設計技術に関する研究
2004
-
MEMSを用いたRF可変インダクタのモデル化手法
2004
-
ウェハレベルパッケージ内蔵高性能オンチップインダクタ
2004
-
Modeling and Optimization of On-Chip Spiral Inductors in S-parameter Domain
2004
-
Wide Tunable LC-VCO using Variable Inductor
2004
-
Si CMOSチップ上に作成した差動伝送線路のアイパターン測定
2004
-
高周波インダクタ内蔵ウェハレベルパッケージ
2004
-
服用型バッテリーレス無線送受信システムの設計
2004
-
GHz帯広帯域PLL向け発振器及び分周器についての検討
2004
-
高速信号伝送に適したオンチップ差動伝送線路構造
2004
-
オンチップ差動伝送線路を用いた高速信号伝送回路
2004
-
Near Field Communication Chip using PIM for Bio Sensor
2004
-
Si ULSI内の高速信号伝送に適した差動伝送線路構造に関する検討
2004
-
配線長分布を用いたオンチップ伝送線路の性能評価
2004
-
Si ULSIにおける擬差動伝送線路構造
2004
-
配線長分布を用いたオンチップ伝送線路の性能評価
2004
-
回路規模と配線層数を考慮した回路とプロセスの協調設計手法
2004
-
Si LSIにおける縒り合わせ差動伝送線路を用いたEMI低減手法
2004
-
Reconfigurable RF Circuit Design for Multi-band Wireless Chip
2004
-
Twisted Differential Transmission Line Structure for EMI Noise Reduction at Global Interconnect in Si LSI
2004
-
High-Speed Transmission Circuit for Micro-Network on Si ULSI
2004
-
On-chip Spiral Inductors Integrated with Wafer-Level Package
2004
-
Small Area Snake Inductor on Si RF CMOS Chip
2004
-
High-Q Variable Inductor Using Redistributed Layers for Si RF Circuits
2004
-
A Wide Tuning Range CMOS VCO using Variable Inductor
2004
-
in-vivo Wireless Communication System for Bio MEMS Sensors
2004
-
Optimization Technique of Number of Interconnect Layers and Circuit Area Based on Wire Length Distribution
2004
-
Battery-less Wireless Communication System through Human Body for in-vivo Healthcare Chip
2004
-
Differential Transmission Line Structure for Over 10 Gbps Signal Transmission at Global Interconnect in Si ULSI
2004
-
Small Area Inductor for Silicon CMOS Chip
2004
-
Modeling for Variable RF Inductor on Si CMOS Chip
2004
-
ULSI Interconnect Length Distribution Model Considering Core Utilization
2004
-
Optimization Methodology of Global Interconnect Structure
2004
-
Extraction and Verification Methodology for MOS Transistor Fluctuation with Intra-chip and Inter-chip Variabilities
2004
-
配線長分布を用いた65nmプロセスにおける配線構造最適化手法
2004
-
Si ULSI内差動伝送線路の時間領域測定による評価
2004
-
Si CMOSチップ内差動伝送線路の時間領域測定による評価
2004
-
配線長分布を用いた65nmプロセスにおける配線構造の最適化
2004
-
Si ULSIにおけるGHz帯差動伝送線路駆動受端回路の設計
2004
-
Pseudo Differential Transmission Line Structure on Si ULSI
2004
-
Wire Length Distribution of SoC considering Macro Block Shapes
2004
-
Reconfigurable RF Circuit Design for Multi-band Wireless Chip
2004
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Near Field Communication Chip using PIM for Bio Sensor
2004
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Differential Transmission Line Interconnect for High Speed and Low Power Global Wiring
2004
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High Speed and Low Power On-Chip Micro Network Circuit with Differential Transmission Line
2004
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Dynamic Reconfigurable RF Circuit Design
2004
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Wide-Range RF Variable Inductor on Si CMOS Chip with MEMS Actuator
2004
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On-Chip Transmission Line for Long Global Interconnects
2004
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High Density Bus Line Structure With Pseudo Differential Transmission Line in Si ULSI
2004
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A 10MHz to 7GHz Quadrature Signal Generation Using a Divide-by-4/3, -3/2, -5/3, -2, -5/2, -3, -4, and -5 Injection-Locked Frequency Divider
IEEE International Solid-State Circuits Conference (ISSCC) 2010
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10MHz to 7GHz Quadrature Signal Generation Using a Divide-by-4/3, -3/2, -5/3, -2, -5/2, -3, -4, and -5 Injection-Locked Frequency Divider
IEEE Symposium on VLSI Circuits 2010
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A 60GHz Direct-Conversion Transmitter in 65nm CMOS Technology
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC) 2010
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Reconfigurable RF CMOS Circuits for Cognitive Radios
IEEE International Solid-State Circuits Conference (ISSCC) 2010
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CMOS 65nmにおけるトランジスタレイアウトの最適化による225〜264GHz広帯域増幅器
Olivia Angel Yong, Chun Wang, 國弘 和明, 酒井 啓之, 白根 篤史, 岡田 健一
電子情報通信学会 LSIとシステムのワークショップ 2024.5
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Zero-Crosstalk Bus Line Structure for Global Interconnects in Si ULSI
2005
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Development of Differential Transmission Line Interconnect IP for High-Speed Global Interconnect
2005
Industrial property rights
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無線送信装置、及び無線送信方法
張 雲程, 岡田 健一
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WIRELESS COMMUNICATION DEVICE AND WIRELESS COMMUNICATION MЕТHОD
Kenichi Okada
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無線機及びフェイズドアレイ無線機
濱田 裕史, 岡田 健一
Works
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コグニティブ無線を実現するリコンフィギュラブルＲＦ回路技術の研究開発
2010 - 2012
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CMOS技術を用いたミリ波帯超高速スケーラブル無線回路技術の研究
2010 - 2011
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ミリ波対応リコンフィギュラブルCMOS電力増幅器の研究
2008 - 2010
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CMOS RF回路によるマルチバンド・マルチモード無線送受信回路の研究
2005 - 2007
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Si CMOS技術による超広帯域リコンフィギュラブルＲＦ集積回路技術の研究開発
2005 - 2007
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ウエハレベルパッケージ技術による高周波IC用インダクタの開発
2005 - 2007
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ウエハレベルパッケージ技術による高周波集積インダクタの研究開発
2005 - 2007
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オンチップＬＡＮを実現するバスＩＰの開発
2003 - 2005
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GHz信号伝送多層配線技術
2001 - 2004
Awards
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電子情報通信学会 論文賞
2025.6
岡田健一
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2024 IEEE A-SSCC 20th Anniversary Top-11 Contributor Award
2024.11
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IEICE Electronics Express (ELEX) Best Paper Award
2024.9
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電子情報通信学会 論文賞
2024.6
岡田健一
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IEEE ISSCC Author-Recognition Award
2023.2
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IEEE Fellow
2023.1
Kenichi Okada
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IEEE APMC 2022 Prize
2022.12
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総務省 戦略的情報通信研究開発推進事業 成果展開推進賞
2022.12
岡田健一
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IEEE ICTA 2022 Best Paper Award
2022.10
Zheng Li, Zixin Chen, Qiaoyu Wang, Jian Pang, Atsushi Shirane, Kenichi Okada
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IEICE Electronics Express (ELEX) Best Paper Award
2022.9
-
電子情報通信学会 論文賞
2022.6
岡田健一
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IEEE Global Symposium on Millimeter-Waves & Terahertz (GSMM), Best Paper Award
2022.5
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IEEE SSCS Japan Chapter Academic Research Award
2022
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LSIとシステムのワークショップ優秀ポスター賞
2021.5
Zheng Li, Jian Pang, 白根篤史, 岡田健一
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システムLSIワークショップ 最優秀ポスター賞
2021.5
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LSIとシステムのワークショップ優秀ポスター賞
2021.5
Yi Zhang, jian Pang, 白根篤史, 岡田健一
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LSIとシステムのワークショップ 優秀ポスター賞
2021.4
山﨑雄大、Alvin Joshua, Pang Jian,白根篤史、岡田健一
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IEEE CICC 2020 Best Paper Award
2021.4
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IEEE ISSCC Outstanding Evening Session Award
2021.2
Kenichi Okada
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IEEE/ACM ASP-DAC, Best Design Award
2021.1
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IEEE ICTA 2020 Best Paper Award
2020.11
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KDDI Foundation Award
2020.3 KDDI
Kenichi Okada
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Kenjiro Takayanagi Achievement Award
2020.1
Kenichi Okada
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DOCOMO Mobile Science Award
2019
OKADA Kenichi
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Best Student Paper Award
2019 IEEE RFIC Symposium
OKADA Kenichi
-
Achievement Award
2019 IEICE
OKADA Kenichi
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Best Paper Award
2018 IEICE
OKADA Kenichi
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MEXT Prizes for Science and Technology
2017 MEXT
OKADA Kenichi
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Prize
2014 JSPS
OKADA Kenichi
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LSIとシステムのワークショップ 優秀ポスター賞
2010
-
東工大挑戦的研究賞
2009
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IEEE Radio-Frequency Integration Technology (RFIT), Best Student Award
2009
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丸文研究奨励賞
2009
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LSI IPデザイン・アワード IP賞
2008
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LSI IPデザイン・アワード 研究助成賞
2008
-
東工大工系若手奨励賞
2008
-
矢崎学術賞(奨励賞)
2008 矢崎科学技術振興記念財団
-
ADMETA Technical Achievement Award
2007
-
システムLSIワークショップ 優秀ポスター賞
2007
-
LSI IPデザイン・アワード 開発奨励賞
2007
-
回路とシステム軽井沢ワークショップ奨励賞
2007
-
LSI IPデザイン・アワード IP賞
2007
-
ADMETA Technical Achievement Award
2007
-
安藤博記念学術奨励賞
2006
-
IEEE A-SSCC Outstanding Design Award
2006
-
井上研究奨励賞
2005 井上科学振興財団
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Ericsson Young Scientist Award
2004
-
Ericsson Young Scientist Award
2004
-
手島記念研究賞 (博士論文賞)
2004 手島工業教育資金団
-
船井情報科学奨励賞
2004 船井情報科学振興財団
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丹羽保次郎記念論文賞
2004
-
優秀論文発表賞
2004 電気学会
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山下記念研究賞
2004 情報処理学会
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優秀ポスター賞
2003 電子情報通信学会
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優秀論文賞
2003 情報処理学会
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学生奨励賞
2002 情報処理学会
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学術奨励賞
2001 電子情報通信学会
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優秀ポスター賞
1998 電子情報通信学会
Research Projects
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マルチフィジックス適応する革新的宇宙折り紙構造の設計手法構築と宇宙実証
Grant number：24H00358 2024.4 - 2027.3
日本学術振興会 科学研究費助成事業 基盤研究(A)
坂本 啓, 戸村 崇, 白根 篤史, 岡田 健一
Grant amount：\48750000 （ Direct Cost: \37500000 、 Indirect Cost：\11250000 ）
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テラヘルツ波による超大容量無線LAN伝送技術の研究開発
2022 - 2026
MIC
-
継続的進化を可能とするB5G IoT SoC及びIoTソリューション構築プラットホームの研究開発
Grant number：JPJ012368C00801 2021 - 2026
NICT
-
次世代LEO通信コンステレーション構築に向けた超小型・低コスト電波・光ハイブリッド通信システムおよび通信制御システムの研究開発
Grant number：JPJ012368C00601 2021 - 2025
NICT
-
Ka帯ビームフォーミング技術による超小型衛星通信の高速・高機能化
2021 - 2025
JST A-STEP
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Flexible Phased Array for Directional Wireless Communication
Grant number：20H00236 2020.4 - 2024.3
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (A)
Grant amount：\44070000 （ Direct Cost: \33900000 、 Indirect Cost：\10170000 ）
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Society 5.0に向けた発電・アンテナ機能を有する軽量膜展開構造物の実証
2020
JAXA
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CMOS Radiation Detector Using Arrayed Correlation
Grant number：25630139 2013.4 - 2014.3
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Challenging Exploratory Research
OKADA Kenichi
Grant amount：\2210000 （ Direct Cost: \1700000 、 Indirect Cost：\510000 ）
In this work, a radiation detector using a CMOS chip has been studied. PET as a plastic scintillator generates ultraviolet light, and the light is detected by single-photon avalanche diode (SPAD) implemented on a CMOS chip. A bias voltage generation is very important to improve SPAD sensitivity. A SPAD array is self-calibrated for excluding defect-elements and having high bias voltage. A clock generation is also required to measure a dark count, and it is used for the calibration. A low-power and accurate on-chip clock generator is realized by using only standard cells.
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High efficiency on-chip antennas for millimeter-wave high speed wireless communications
Grant number：24760291 2012.4 - 2015.3
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (B)
HIRANO Takuichi, ANDO Makoto, HIROKAWA Jiro, OKADA Kenichi, YAO Yuki
Grant amount：\4550000 （ Direct Cost: \3500000 、 Indirect Cost：\1050000 ）
Radiation efficiency enhancement of a millimeter-wave on-chip antenna was investigated in this theme. Low radiation efficiency of an on-chip antenna is due to high conductivity of the silicon substrate. High precision electromagnetic simulation model was investigated at first. Two methods, 1) use of well protection layer, 2) He-3 ion beam irradiation, were performed to improve radiation efficiency. Radiation efficiency of 40 % was obtained by He-3 ion irradiation.
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Scalable RF CMOS chip for tera-bit wireless communications
Grant number：22686037 2010 - 2012
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (A)
OKADA Kenichi
Grant amount：\19500000 （ Direct Cost: \15000000 、 Indirect Cost：\4500000 ）
In this work, a fundamental theory of scalable RF transceiver has been studies for realizing 1Tbps ultra-high-speed wireless communication. The key technology for the scalable RF transceiver is the improvement of gain, linearity and noise characteristics, and a circuit technique to maintain the circuit performance even with the process fluctuation. In this work, the proposed digital RF technique is applied to realize a self-calibration of the60GHz wireless transceiver implemented by 65nm CMOS. The phase noise degradation is avoided by using the proposed injection-locked oscillator, which results in a 20-dB improvement in the phase noise. Finally, a 20Gbps wireless transceiver has been realized, which is the fastest among wireless transceiver ICs.
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Signal Integrity of Nano-Scale interconnect and Circuit
Grant number：18063008 2006 - 2009
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research on Priority Areas
MASU Kazuya, ISHIHARA Noboru, SATO Takashi, AMAKAWA Shuhei, ITO Hiroyuki, OKADA Kenichi
Grant amount：\106000000 （ Direct Cost: \106000000 ）
Nano-scale MOSFET has enabled a great number of circuit elements can be integrated into a single chip. So far, MOSFET has been miniaturized according to a scaling scheme, however, the chip size has not been reduced because more functions is required to be implemented on one chip; interconnect delays of long wires limit digital circuit performance. Interconnect design is a never-ending issue with CMOS LSI. For long wiring, we have developed transmission line interconnect (TLI).
In this project, we have developed (1) estimation of interconnect resource of nano-CMOS based on interconnect wire length distribution, (2) modeling of novel interconnect structure such as periodic scheme, multi-port analysis for cross-talk modeling, etc., (3) de-embedding method up to 100GHz which is essential in ultra high speed nano-CMOS circuit, (4) high-speed, low-latency, low-power, energy-efficient transmission line interconnect, which has been designed, fabricated and evaluated on 180nm, 90nm, and 65nm CMOS, and small area, low power, high-speed on-chip SER/DES circuits, (5) comparison of interconnect performance of transmission line, optical and wireless interconnects. -
Development of On-chip Nano-Scale Network Based on Communication Theory
Grant number：16206034 2004 - 2007
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (A)
MASU Kazuya, ITO Hiroyuki, SATO Takashi, AMAKAWA Shuhei, ISHIDA Koichi
Grant amount：\49790000 （ Direct Cost: \38300000 、 Indirect Cost：\11490000 ）
Si CMOS has been scaled according to the "Scaling Concept" and have achieved high performance, low power consumption, and high functionality. The Si CMOS has become the most important hardware in ubiquitous network. In 2013, hundred million transistors will be integrated on a one chip of 20mm square using 35nm technology and the operating frequency is expected to be over 20GHz. The Si CMOS is progressing toward Nano Scale era.
In this work, the signal propagation is recognized to be just communication, and we have developed global wiring technology. The novel analytic expression has been derived for wire length distribution ; the wire length distribution and cumulative number of interconnects of real 130nm and 90nm CMOS chip are well expressed by our new model. We have developed global wiring technology based on differential transmission line ; 0.27pJ/bit transmission has been successfully achieved on 1cm long interconnect, and mutli drop transmission line interconnect has been also developed for future network on-chip technology. Furthermore, novel FoM (Figure of Merit) has been proposed to compare the performance of various interconnects ; the conventional RC line, the RC line using CNT (Carbon Nano Tube), transmission line interconnect which has been developed in this work, optical interconnect, and wireless interconnect. As a results, the FoM of the transmission line interconnect has most superior in the range of several hundred micron to several mm. This means the transmission line has been the best solution for global wiring. -
Study and Development of bus IP for On-chip LAN
2003.7 - 2006.3
Grant for Young Fixed-term Researcher
Grant type：Competitive
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Reconfigurable Analog RF circuits
Grant number：17686030 2003 - 2008
Grant type：Competitive
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マイクロメカニクス技術を用いたGHz帯可変インダクタの開発
Grant number：14655132 2002 - 2003
日本学術振興会 科学研究費助成事業 萌芽研究
益 一哉, 岡田 健一, 下河邉 明
Grant amount：\3200000 （ Direct Cost: \3200000 ）
本研究は、元々「マイクロアクチュエータ」という微少機械部品としての応用を目指していた研究を、「可変インダクタ」という電気回路部品として、いわば異なる応用分野へ展開しようとする研究である。現在の携帯電話をはじめとする機器ではGHz帯で動作するSi CMOSパワーアンプなどが利用されている。最適な動作を行うためにインピーダンスマッチングを取るために、受動素子としての高性能インダクタが必要であり、また小型化のためにはこの受動素子であるインダクタがSiチップ上に形成されていることが好ましい。Si ULSIでは加工寸法ばらつきなどが本質的に伴うため、チップ毎に最適マッチングをとるためにはチップ上のインダクタが可変であることが望まれる。本研究ではSi ULSIプロセスに適合可能なマイクロメカニクス技術(MEMS技術)を利用して、Siチップ上に可変インダクタを形成する。具体的な材料として「薄膜金属ガラス」を用いる。これまでに分担者が開発してきた「マイクロ構造アクチュエータ」構造を「GHz帯可変インダクタ」に応用する。本年度は、GHz帯での利用を想定し、インダクタンスは数nH、インダクタンス可変範囲10%程度、Q値は10以上を目標とした。当初計画していたものに加え、オンチップスパイラルインダクタと導体板を用いた構造の可変インダクタを開発した。導体板をMEMSアクチュエータにより移動させることで、290%もの変化率を達成することに成功した。再配線層を用いたインダクタにより、Q値が50以上の可変インダクタを作製することに成功した。
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超高速マイクロ構造伝送配線の開発とRF駆動回路の研究
Grant number：13025218 2001 - 2003
日本学術振興会 科学研究費助成事業 特定領域研究
益 一哉, 岡田 健一
Grant amount：\63300000 （ Direct Cost: \63300000 ）
微細化・高集積化されたSi集積回路は、高機能化の必然としてチップの大きさも1cmを越え、そのためデバイスそのものがたとえ高速動作しても、デバイスを接続する配線が動作速度を律速すると云う問題を抱えている。従来の信号伝送設計ならびに配線設計は「RC集中定数回路モデル」に基づいており、取り扱う信号の波長が対象とする回路の大きさ・寸法に比較して無視できなくなった時に考慮すべき「伝送線路」という概念がまったく取り入れられていない。本研究では、Si LSIチップ内、さらにはチップ間のGHz信号伝送を可能にする配線構造ならびにその低消費電力駆動回路技術を開発する。具体的には、Si集積回路内に適用可能なマイクロ構造RF伝送配線ならびにその駆動集積回路を開発する。
平成15年度は、ペア線構造伝送線路配線とマイクロ構造GHz伝送およびRF駆動回路の設計・試作・評価を行う計画を立てた。CMOS0.35μmプロセスにおいて、差動線路の性能としては40Gbps、駆動回路を含めた評価では6Gbpsの高速信号伝送を達成した。クロストークノイズに強い伝送線路構造を考案し、隣接配線までの距離を小さくすることで、配線面積を72%削減することを可能とした。また、線路の抵抗損失による信号波形劣化を抑え、かつ差動回路における直流電流を低減する観点から、線路の特性インピーダンスは50Ωよりも大きく、100Ω程度としたほうが良いことを、回路設計の見地から明らかにした。 -
Investigation of in vivo Wireless Communication Chip
Grant number：13450139 2001 - 2003
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B)
MASU Kazuya, OKADA Kenichi
Grant amount：\14900000 （ Direct Cost: \14900000 ）
Bio sensors have been developed using bio MEMS technology as a key device of μ-TAS (micro-Total Analytical System). This work investigates a small-size healthcare device which uses wireless communication through human body. It can realize interactive sensing of pH in stomach, internal body temperature, and so on. Transmission characteristics of human body are measured at several frequencies. There are two types of transmission : electromagnetic wave transmission and electromagnetic coupling transmission. The electromagnetic coupling transmission has advantageous to the electromagnetic wave transmission because of attenuation characteristics. We developed an in-vivo wireless communication chip using the electromagnetic coupling transmission at 13.56MHz. It can realize battery-less communication since power is supplied by induced electromotive force. We propose a pulse interval modulation to communicate under such the large attenuation environment. PIM does not depend on magnitude of transmitted signal. From these results, the survey for in-vivo wireless communication system has been established.
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微細集積回路の歩留り保障設計技術の研究
Grant number：00J03554 2000 - 2002
日本学術振興会 科学研究費助成事業 特別研究員奨励費
岡田 健一
Grant amount：\3000000 （ Direct Cost: \3000000 ）
本研究の目的は,プロセスの最適化から回路特性の最適化までを含んだ歩留り最適化設計手法の提案である。製造プロセスをも最適化の対象とすることで,総合的な歩留り最適化が可能となり,歩留りの改善と設計時間の短縮が同時に達成できる。本年度は、デジタル回路を対象として,チップ内のトランジスタばらつきや,ゲート内のばらつきを考慮した統計遅延解析手法について提案を行なった。詳細は下記の通りである。
1.実測値からのチップ内ばらつき抽出手法 製造ばらつきを考慮した回路設計では,チップ間のばらつきのみならず,チップ内でのばらつきを考慮する必要がある。本研究では,チップ内ばらつきとチップ間ばらつきのモデル化,および,モデルパラメータの抽出手法を提案する。チップ内ばらつきをチップ間ばらつきから分離するのは困難であったが,電流値のばらつきから直接計算することで,チップ内ばらつきパラメータを抽出する。リングオシレータの発振周波数ばらつきとの比較を行うことで,提案手法の精度検証を行った。
2.チップ内ばらつきのサイズ依存を考慮した統計遅延解析手法現実的な回路遅延変動量を知るために,実測したトランジスタ特性のばらつきからゲート遅延ばらつきを求める。従来の統計遅延解析では,チップ内ばらつきのサイズ依存を考慮していなかったが,応答曲面法を用いた手法により,チップ内ばらつきのサイズ依存性を考慮した遅延モデルの生成手法を提案した。
3.ゲート内ばらつきを考慮した統計遅延解析手法ゲート遅延ばらつきの見積りにおいて,論理ゲート内のトランジスタ間ばらつきを考慮する事が重要である。本研究では,ゲート内でのばらつきを考慮したゲート遅延ばらつきモデルを提案した。提案モデルは,トランジスタ特性を共通成分と独立変動成分に分けて,それらの変動量から遅延時間を与える。具体的な回路の遅延ばらつきを例に,ゲート内ばらつきを考慮する場合としない場合で,遅延分布に差がでることを示した。
Media Coverage
-
6G向け、640ギガ伝送 CMOS送受信IC開発 Newspaper, magazine
日刊工業新聞 2024.8
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半導体再興へ 大学の最先端研究 高周波回路 世界を先導 Newspaper, magazine
日刊工業新聞 2024.7